This way we can offer to callers the service of just sizing
instructions, and we also can better guarantee not to raise the wrong
fault due to not having read all relevant bytes.
Signed-off-by: Jan Beulich
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
On 08/09/16 14:07, Jan Beulich wrote:
> This way we can offer to callers the service of just sizing
> instructions, and we also can better guarantee not to raise the wrong
> fault due to not having read all relevant bytes.
>
> Signed-off-by: Jan Beulich
>
> --- a/xen/arch/x86/x86_emulate/x86_emula
>>> On 13.09.16 at 20:44, wrote:
> On 08/09/16 14:07, Jan Beulich wrote:
>> @@ -1602,6 +1602,45 @@ struct x86_emulate_state {
>> #define _regs (state->regs)
>>
>> static int
>> +x86_decode_base(
>
> What do you mean by decode_base here?
The base instruction set (no 0f or alike prefixes). Sug
On 14/09/16 10:55, Jan Beulich wrote:
On 13.09.16 at 20:44, wrote:
On 08/09/16 14:07, Jan Beulich wrote:
@@ -1602,6 +1602,45 @@ struct x86_emulate_state {
#define _regs (state->regs)
static int
+x86_decode_base(
What do you mean by decode_base here?
The base instruction set (no 0f or
>>> On 23.09.16 at 16:48, wrote:
> On 14/09/16 10:55, Jan Beulich wrote:
> On 13.09.16 at 20:44, wrote:
>>> I would suggest leaving the generate_exception_if(mode_64bit(), EXC_UD,
>>> -1); after the ASSERT() so even if we do end up in a wonky state, we
>>> don't try to jump the guest to 0.
>>
