On 2015/5/4 16:57, Jan Beulich wrote:
On 04.05.15 at 07:08, wrote:
At first I doubted this is issued by some improper cache behaviors.
Because as you see, "root_entry[0] = 80f5001" indicates we already set
that present bit. But Caching Mode bit is zero in BDW so this means
remapping hardware do
>>> On 04.05.15 at 07:08, wrote:
> At first I doubted this is issued by some improper cache behaviors.
> Because as you see, "root_entry[0] = 80f5001" indicates we already set
> that present bit. But Caching Mode bit is zero in BDW so this means
> remapping hardware doesn't own contest cache. An
Chen, Tiejun wrote on 2015-05-04:
> Yang,
>
> Thanks for your review.
>
> On 2015/5/4 12:07, Zhang, Yang Z wrote:
>> Chen, Tiejun wrote on 2015-05-04:
>>> While initializing VT-D we should mask interrupt message generation
>>> to avoid receiving any interrupt as pending before enable DMA
>>> tran
Yang,
Thanks for your review.
On 2015/5/4 12:07, Zhang, Yang Z wrote:
Chen, Tiejun wrote on 2015-05-04:
While initializing VT-D we should mask interrupt message generation
to avoid receiving any interrupt as pending before enable DMA
translation, and also mask that before disable DMA engine.
Chen, Tiejun wrote on 2015-05-04:
> While initializing VT-D we should mask interrupt message generation
> to avoid receiving any interrupt as pending before enable DMA
> translation, and also mask that before disable DMA engine.
>
> Signed-off-by: Tiejun Chen
> ---
> xen/drivers/passthrough/vtd/
While initializing VT-D we should mask interrupt message generation
to avoid receiving any interrupt as pending before enable DMA
translation, and also mask that before disable DMA engine.
Signed-off-by: Tiejun Chen
---
xen/drivers/passthrough/vtd/iommu.c | 31 +++
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