Re: [Xen-devel] [PATCH 3/4] x86emul: correct handling of FPU insns faulting on memory write

2017-03-14 Thread Tian, Kevin
> From: Jan Beulich [mailto:jbeul...@suse.com] > Sent: Monday, March 13, 2017 7:05 PM > > When an FPU instruction with a memory destination fails during the memory > write, it should not affect FPU register state. Due to the way we emulate FPU > (and SIMD) instructions, we can only guarantee this

Re: [Xen-devel] [PATCH 3/4] x86emul: correct handling of FPU insns faulting on memory write

2017-03-13 Thread Andrew Cooper
On 13/03/17 11:05, Jan Beulich wrote: > When an FPU instruction with a memory destination fails during the > memory write, it should not affect FPU register state. Due to the way > we emulate FPU (and SIMD) instructions, we can only guarantee this by > - backing out changes to the FPU register stat

[Xen-devel] [PATCH 3/4] x86emul: correct handling of FPU insns faulting on memory write

2017-03-13 Thread Jan Beulich
When an FPU instruction with a memory destination fails during the memory write, it should not affect FPU register state. Due to the way we emulate FPU (and SIMD) instructions, we can only guarantee this by - backing out changes to the FPU register state in such a case or - doing a descriptor read