Re: [Xen-devel] [PATCH for-4.9] x86/vioapic: allow holes in the GSI range for PVH Dom0

2017-04-18 Thread Jan Beulich
>>> On 18.04.17 at 10:49, wrote: > On Tue, Apr 18, 2017 at 02:39:34AM -0600, Jan Beulich wrote: >> >>> On 17.04.17 at 18:09, wrote: >> > @@ -601,7 +587,12 @@ int vioapic_init(struct domain *d) >> > nr_gsis += nr_pins; >> > } >> > >> > -

Re: [Xen-devel] [PATCH for-4.9] x86/vioapic: allow holes in the GSI range for PVH Dom0

2017-04-18 Thread Andrew Cooper
On 18/04/2017 09:49, Roger Pau Monne wrote: > On Tue, Apr 18, 2017 at 02:39:34AM -0600, Jan Beulich wrote: > On 17.04.17 at 18:09, wrote: >>> @@ -601,7 +587,12 @@ int vioapic_init(struct domain *d) >>> nr_gsis += nr_pins; >>> } >>> >>> -

Re: [Xen-devel] [PATCH for-4.9] x86/vioapic: allow holes in the GSI range for PVH Dom0

2017-04-18 Thread Roger Pau Monne
On Tue, Apr 18, 2017 at 02:39:34AM -0600, Jan Beulich wrote: > >>> On 17.04.17 at 18:09, wrote: > > @@ -601,7 +587,12 @@ int vioapic_init(struct domain *d) > > nr_gsis += nr_pins; > > } > > > > -ASSERT(hvm_domain_irq(d)->nr_gsis == nr_gsis); > > +/* >

Re: [Xen-devel] [PATCH for-4.9] x86/vioapic: allow holes in the GSI range for PVH Dom0

2017-04-18 Thread Jan Beulich
>>> On 17.04.17 at 18:09, wrote: > @@ -601,7 +587,12 @@ int vioapic_init(struct domain *d) > nr_gsis += nr_pins; > } > > -ASSERT(hvm_domain_irq(d)->nr_gsis == nr_gsis); > +/* > + * NB: hvm_domain_irq(d)->nr_gsis is actually the highest GSI + 1,

Re: [Xen-devel] [PATCH for-4.9] x86/vioapic: allow holes in the GSI range for PVH Dom0

2017-04-18 Thread Roger Pau Monne
On Mon, Apr 17, 2017 at 05:09:22PM +0100, Roger Pau Monne wrote: > The current vIO APIC for PVH Dom0 doesn't allow non-contiguous GSIs, which > means that all GSIs must belong to an IO APIC. This doesn't match reality, > where there are systems with non-contiguous GSIs. > > In order to fix this

Re: [Xen-devel] [PATCH for-4.9] x86/vioapic: allow holes in the GSI range for PVH Dom0

2017-04-17 Thread Chao Gao
On Mon, Apr 17, 2017 at 05:09:22PM +0100, Roger Pau Monne wrote: >The current vIO APIC for PVH Dom0 doesn't allow non-contiguous GSIs, which >means that all GSIs must belong to an IO APIC. This doesn't match reality, >where there are systems with non-contiguous GSIs. > >In order to fix this add a

[Xen-devel] [PATCH for-4.9] x86/vioapic: allow holes in the GSI range for PVH Dom0

2017-04-17 Thread Roger Pau Monne
The current vIO APIC for PVH Dom0 doesn't allow non-contiguous GSIs, which means that all GSIs must belong to an IO APIC. This doesn't match reality, where there are systems with non-contiguous GSIs. In order to fix this add a base_gsi field to each hvm_vioapic struct, in order to store the base