On Tue, 22 Mar 2016, Shanker Donthineni wrote:
> On 03/22/2016 05:21 PM, Julien Grall wrote:
> > (CC some ARM folks)
> >
> > On 21/03/2016 23:18, Shanker Donthineni wrote:
> >> Hi Julien,
> >
> > Hello Shanker,
> >
> > Sorry for the late answer.
> >
> >> Do you have any other comments to be address
On 03/22/2016 05:21 PM, Julien Grall wrote:
> (CC some ARM folks)
>
> On 21/03/2016 23:18, Shanker Donthineni wrote:
>> Hi Julien,
>
> Hello Shanker,
>
> Sorry for the late answer.
>
>> Do you have any other comments to be addressed?
>
> I have a question regarding the implication for what you wr
(CC some ARM folks)
On 21/03/2016 23:18, Shanker Donthineni wrote:
Hi Julien,
Hello Shanker,
Sorry for the late answer.
Do you have any other comments to be addressed?
I have a question regarding the implication for what you wrote in the
commit.
As far as I understand, any speculative
Hi Julien,
Do you have any other comments to be addressed?
On 03/16/2016 02:08 PM, Shanker Donthineni wrote:
> From: Vikram Sethi
>
> ARMv8 architecture allows performing prefetch data/instructions
> from memory locations marked as normal memory. Prefetch does not
> mean that the data/instructio
From: Vikram Sethi
ARMv8 architecture allows performing prefetch data/instructions
from memory locations marked as normal memory. Prefetch does not
mean that the data/instruction has to be used/executed in code
flow. All PTEs that appear to be valid to MMU must contain valid
physical address with
