Sorry for top post.
That makes sense, thanks!
Cheers,
Edgar
---
Sent from my phone
On 11/03/2015 7:46 pm, "Ian Campbell" wrote:
> On Wed, 2015-03-11 at 09:59 +1000, Edgar E. Iglesias wrote:
> > On Tue, Mar 10, 2015 at 11:30:10AM +, Julien Grall wrote:
> > > Hello Edgar,
> > >
> > > Thank y
On Wed, 2015-03-11 at 09:59 +1000, Edgar E. Iglesias wrote:
> On Tue, Mar 10, 2015 at 11:30:10AM +, Julien Grall wrote:
> > Hello Edgar,
> >
> > Thank you for adding support of the ZynqMP.
> >
> > On 10/03/15 02:49, Edgar E. Iglesias wrote:
> > > From: "Edgar E. Iglesias"
> > >
> > > Adds s
On Tue, Mar 10, 2015 at 11:30:10AM +, Julien Grall wrote:
> Hello Edgar,
>
> Thank you for adding support of the ZynqMP.
>
> On 10/03/15 02:49, Edgar E. Iglesias wrote:
> > From: "Edgar E. Iglesias"
> >
> > Adds support for the Cadence UART in Xilinx ZynqMP. The
> > rest of the ZynqMP platf
Hello Edgar,
Thank you for adding support of the ZynqMP.
On 10/03/15 02:49, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Adds support for the Cadence UART in Xilinx ZynqMP. The
> rest of the ZynqMP platform is discovered via device-tree.
Did you make sure that the default grant tab
From: "Edgar E. Iglesias"
Adds support for the Cadence UART in Xilinx ZynqMP. The
rest of the ZynqMP platform is discovered via device-tree.
Cheers,
Edgar
Changelog:
v2 -> v3:
* Fix coding style issues. (Julien review)
v1 -> v2:
* Rebase with upstream/staging to fix the device-tree device mat
