...
> > /*
> > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index
> > 390c8b0..e4512a8 100644
> > --- a/xen/arch/arm/gic.c
> > +++ b/xen/arch/arm/gic.c
> > @@ -565,12 +565,13 @@ static void do_sgi(struct cpu_user_regs *regs,
> > enum gic_sgi sgi) void gic_interrupt(struct cpu_user_regs *r
On 26/02/15 14:45, Frediano Ziglio wrote:
>> I would prefer if we avoid to add more compatibles like that in gic.h.
>>
>> I have a patch to drop a part of this mess. I would advise your to use
>> cherry-pick the commit [1] in your branch.
>>
>> [1]
>> http://xenbits.xen.org/gitweb/?p=people/julieng
>
> Hi Frediano,
>
> On 26/02/15 12:40, Frediano Ziglio wrote:
> > diff --git a/xen/arch/arm/domain_build.c
> b/xen/arch/arm/domain_build.c
> > index c2dcb49..0834053 100644
> > --- a/xen/arch/arm/domain_build.c
> > +++ b/xen/arch/arm/domain_build.c
> > @@ -1038,6 +1038,7 @@ static int handle_nod
Hi Frediano,
On 26/02/15 12:40, Frediano Ziglio wrote:
> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
> index c2dcb49..0834053 100644
> --- a/xen/arch/arm/domain_build.c
> +++ b/xen/arch/arm/domain_build.c
> @@ -1038,6 +1038,7 @@ static int handle_node(struct domain *d, s
The GIC in this platform is mainly compatible with the standard
GICv2 beside:
- ITARGET is extended to 16 bit to support 16 CPUs;
- SGI mask is extended to support 16 CPUs;
- maximum supported interrupt is 510.
Use nr_lines to check for maximum irq supported. hip04-d01 support less
interrupts due
