Re: [Xen-devel] [RFC PATCH] hvm/vpt: fix inconsistent views of vIOAPIC in vmx_intr_assist()

2017-04-21 Thread Chao Gao
On Fri, Apr 21, 2017 at 10:00:16PM +0800, Tian, Kevin wrote: >btw I'm thinking whether adding lock in vmx_intr_assist is >necessary... Can you think whether below option may >work? > >Do lock protection within pt_update_irq. Make sure vector >not changed between setting vIRR and finding pt_irq_vect

Re: [Xen-devel] [RFC PATCH] hvm/vpt: fix inconsistent views of vIOAPIC in vmx_intr_assist()

2017-04-21 Thread Tian, Kevin
> From: Gao, Chao > Sent: Friday, April 21, 2017 12:23 PM > > >> @@ -487,13 +494,14 @@ int vpic_ack_pending_irq(struct vcpu *v) > >> struct hvm_hw_vpic *vpic = &v->domain->arch.hvm_domain.vpic[0]; > >> > >> ASSERT(has_vpic(v->domain)); > >> +ASSERT(vpic_is_locked(vpic)); > >> > >>

Re: [Xen-devel] [RFC PATCH] hvm/vpt: fix inconsistent views of vIOAPIC in vmx_intr_assist()

2017-04-21 Thread Chao Gao
Kevin, thanks for your reply. On Fri, Apr 21, 2017 at 06:56:39PM +0800, Tian, Kevin wrote: >> From: Gao, Chao >> Sent: Friday, April 7, 2017 11:24 AM >> >> When injecting periodic timer interrupt in vmx_intr_assist(), multiple read >> operation is operated during one event delivery and incur to i

Re: [Xen-devel] [RFC PATCH] hvm/vpt: fix inconsistent views of vIOAPIC in vmx_intr_assist()

2017-04-21 Thread Tian, Kevin
> From: Gao, Chao > Sent: Friday, April 7, 2017 11:24 AM > > When injecting periodic timer interrupt in vmx_intr_assist(), multiple read > operation is operated during one event delivery and incur to inconsistent operation is operated -> operations are done > views of vIOAPIC. For example, if a

Re: [Xen-devel] [RFC PATCH] hvm/vpt: fix inconsistent views of vIOAPIC in vmx_intr_assist()

2017-04-21 Thread Jan Beulich
>>> On 21.04.17 at 04:42, wrote: > PING... > > Please give some comments. I think this bug should be fixed in Xen 4.9. I'm sorry, you've posted this as an RFC, which sits behind 80 other RFCs which want looking at, which in turn sit behind some 30 non-RFCs for 4.10. If you intend something for 4

Re: [Xen-devel] [RFC PATCH] hvm/vpt: fix inconsistent views of vIOAPIC in vmx_intr_assist()

2017-04-21 Thread Chao Gao
PING... Please give some comments. I think this bug should be fixed in Xen 4.9. On Fri, Apr 07, 2017 at 11:24:16AM +0800, Chao Gao wrote: >When injecting periodic timer interrupt in vmx_intr_assist(), multiple read >operation is operated during one event delivery and incur to inconsistent >views

Re: [Xen-devel] [RFC PATCH] hvm/vpt: fix inconsistent views of vIOAPIC in vmx_intr_assist()

2017-04-11 Thread Chao Gao
On Wed, Apr 12, 2017 at 02:45:36AM +, Xuquan (Quan Xu) wrote: >On April 07, 2017 11:24 AM, Chao Gao wrote: >>When injecting periodic timer interrupt in vmx_intr_assist(), multiple read >>operation is operated during one event delivery and incur to inconsistent >>views of vIOAPIC. For example, i

Re: [Xen-devel] [RFC PATCH] hvm/vpt: fix inconsistent views of vIOAPIC in vmx_intr_assist()

2017-04-11 Thread Chao Gao
On Wed, Apr 12, 2017 at 02:45:36AM +, Xuquan (Quan Xu) wrote: >On April 07, 2017 11:24 AM, Chao Gao wrote: >>When injecting periodic timer interrupt in vmx_intr_assist(), multiple read >>operation is operated during one event delivery and incur to inconsistent >>views of vIOAPIC. For example, i

Re: [Xen-devel] [RFC PATCH] hvm/vpt: fix inconsistent views of vIOAPIC in vmx_intr_assist()

2017-04-11 Thread Xuquan (Quan Xu)
On April 07, 2017 11:24 AM, Chao Gao wrote: >When injecting periodic timer interrupt in vmx_intr_assist(), multiple read >operation is operated during one event delivery and incur to inconsistent >views of vIOAPIC. For example, if a periodic timer interrupt is from PIT, when >set the corresponding

[Xen-devel] [RFC PATCH] hvm/vpt: fix inconsistent views of vIOAPIC in vmx_intr_assist()

2017-04-07 Thread Chao Gao
When injecting periodic timer interrupt in vmx_intr_assist(), multiple read operation is operated during one event delivery and incur to inconsistent views of vIOAPIC. For example, if a periodic timer interrupt is from PIT, when set the corresponding bit in vIRR, the corresponding RTE is accessed i