This run is configured for baseline tests only.

flight 67579 ovmf real [real]
http://osstest.xs.citrite.net/~osstest/testlogs/logs/67579/

Perfect :-)
All tests in this flight passed as required
version targeted for testing:
 ovmf                 72388f9c10126a718a7ac381dc6879d3337ccb8b
baseline version:
 ovmf                 d36447418d32d82c4d1033ffcf5cb6244031ac9f

Last test of basis    67577  2016-08-22 09:48:26 Z    0 days
Testing same since    67579  2016-08-22 17:23:09 Z    0 days    1 attempts

------------------------------------------------------------
People who touched revisions under test:
  Ard Biesheuvel <ard.biesheu...@linaro.org>
  Hao Wu <hao.a...@intel.com>
  Liming Gao <liming....@intel.com>
  Vikas C Sajjan <vikas.cha.saj...@hpe.com>

jobs:
 build-amd64-xsm                                              pass    
 build-i386-xsm                                               pass    
 build-amd64                                                  pass    
 build-i386                                                   pass    
 build-amd64-libvirt                                          pass    
 build-i386-libvirt                                           pass    
 build-amd64-pvops                                            pass    
 build-i386-pvops                                             pass    
 test-amd64-amd64-xl-qemuu-ovmf-amd64                         pass    
 test-amd64-i386-xl-qemuu-ovmf-amd64                          pass    


------------------------------------------------------------
sg-report-flight on osstest.xs.citrite.net
logs: /home/osstest/logs
images: /home/osstest/images

Logs, config files, etc. are available at
    http://osstest.xs.citrite.net/~osstest/testlogs/logs

Test harness code can be found at
    http://xenbits.xensource.com/gitweb?p=osstest.git;a=summary


Push not applicable.

------------------------------------------------------------
commit 72388f9c10126a718a7ac381dc6879d3337ccb8b
Author: Hao Wu <hao.a...@intel.com>
Date:   Wed Aug 17 21:28:39 2016 +0800

    SecurityPkg Tcg2: Remove use of module internal API InternalIsZeroBuffer()
    
    This commit removes the internal implementation of the function
    InternalIsZeroBuffer(). Instead, it will use the API IsZeroBuffer() from
    BaseMemoryLib in MdePkg.
    
    Cc: Jiewen Yao <jiewen....@intel.com>
    Cc: Chao Zhang <chao.b.zh...@intel.com>
    Cc: Liming Gao <liming....@intel.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Hao Wu <hao.a...@intel.com>
    Reviewed-by: Chao Zhang <chao.b.zh...@intel.com>
    Reviewed-by: Liming Gao <liming....@intel.com>

commit 102b4c7cdd11172d5b7fde35a0c472ecd7fa49e7
Author: Hao Wu <hao.a...@intel.com>
Date:   Wed Aug 17 14:27:49 2016 +0800

    MdePkg BaseMemoryLibSse2: Add SSE2 implementation of API IsZeroBuffer()
    
    Add the implementation of API IsZeroBuffer() via assembly in
    BaseMemoryLibSse2.
    
    The assembly codes use SSE2 XMM registers and related instructions.
    
    Cc: Michael D Kinney <michael.d.kin...@intel.com>
    Cc: Liming Gao <liming....@intel.com>
    Cc: Jiewen Yao <jiewen....@intel.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Hao Wu <hao.a...@intel.com>
    Reviewed-by: Liming Gao <liming....@intel.com>

commit 02b5cf7fb1824e089f19ca03b685a1f196860bf6
Author: Hao Wu <hao.a...@intel.com>
Date:   Wed Aug 17 14:26:25 2016 +0800

    MdePkg BaseMemoryLib: Add assembly implementation of API IsZeroBuffer()
    
    Add the implementation of API IsZeroBuffer() via assembly for the
    following library instances:
    BaseMemoryLibMmx
    BaseMemoryLibOptDxe
    BaseMemoryLibOptPei
    BaseMemoryLibRepStr
    
    Cc: Michael D Kinney <michael.d.kin...@intel.com>
    Cc: Liming Gao <liming....@intel.com>
    Cc: Jiewen Yao <jiewen....@intel.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Hao Wu <hao.a...@intel.com>
    Reviewed-by: Liming Gao <liming....@intel.com>

commit 1944b02b03e14d023e8f2cd3d614df6eca9dc8f0
Author: Hao Wu <hao.a...@intel.com>
Date:   Wed Aug 17 14:24:04 2016 +0800

    MdePkg BaseMemoryLib: Add C implementation of API IsZeroBuffer()
    
    Add the implementation of API IsZeroBuffer() via C language for the
    following library instances:
    BaseMemoryLib
    PeiMemoryLib
    UefiMemoryLib
    
    Cc: Michael D Kinney <michael.d.kin...@intel.com>
    Cc: Liming Gao <liming....@intel.com>
    Cc: Jiewen Yao <jiewen....@intel.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Hao Wu <hao.a...@intel.com>
    Reviewed-by: Liming Gao <liming....@intel.com>

commit bce0133b7f0d5583c53fae0e80597568a3c8c411
Author: Hao Wu <hao.a...@intel.com>
Date:   Wed Aug 17 21:12:57 2016 +0800

    SecurityPkg Tcg2: Rename internal API IsZeroBuffer to InternalIsZeroBuffer
    
    Before adding API IsZeroBuffer() in BaseMemoryLib at MdePkg, rename the
    internal implementations of IsZeroBuffer() within SecurityPkg/Tcg modules
    to avoid breaking bisection.
    
    Cc: Jiewen Yao <jiewen....@intel.com>
    Cc: Chao Zhang <chao.b.zh...@intel.com>
    Cc: Liming Gao <liming....@intel.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Hao Wu <hao.a...@intel.com>
    Reviewed-by: Chao Zhang <chao.b.zh...@intel.com>
    Reviewed-by: Liming Gao <liming....@intel.com>

commit 313831d9333d66f311b18c671ae5ae0e755435f1
Author: Hao Wu <hao.a...@intel.com>
Date:   Wed Aug 3 15:29:50 2016 +0800

    MdePkg BaseMemoryLib: Add implementation of API IsZeroGuid()
    
    Cc: Michael D Kinney <michael.d.kin...@intel.com>
    Cc: Liming Gao <liming....@intel.com>
    Cc: Jiewen Yao <jiewen....@intel.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Hao Wu <hao.a...@intel.com>
    Reviewed-by: Liming Gao <liming....@intel.com>

commit 669a7562cb3488f36550dc43b8db8d312da1f281
Author: Ard Biesheuvel <ard.biesheu...@linaro.org>
Date:   Wed Aug 10 10:55:30 2016 +0200

    BaseTools/GccBase.lds: don't copy RELA section to PE/COFF
    
    The CLANG38 toolchain creates a PIE binary at link time. This is
    necessary since the LTO code generation may otherwise result in
    code that cannot execute correctly when loaded above 2 GB.
    
    PIE executables contain a RELA section consisting of dynamic
    relocation entries that are intended for consumption by the loader
    at runtime. For this reason, it has the SHF_ALLOC attribute set by
    default, and will be identified by GenFw as a section that needs to
    be copied into the PE/COFF binary, resulting in waste of space since
    the PE/COFF loader does not use this data at all.
    
    So mark the RELA section as informational: this will prevent the
    linker from setting the SHF_ALLOC attribute, causing GenFw to
    ignore it.
    
    DxeCore.efi before:
    
        Detected 'X64' type PE/COFF image consisting of 3 sections
        Section alignment:      0x40
        File alignment:         0x40
        Section '.text' @ 0x00000240
        File offset:            0x240
        Virtual size:           0x21000
        Raw size:               0x21000
        Section '.data' @ 0x00021240
        File offset:            0x21240
        Virtual size:           0x3640
        Raw size:               0x3640
        Section '.reloc' @ 0x00024880
        File offset:            0x24880
        Virtual size:           0x280
        Raw size:               0x280
    
    DxeCore.efi after:
    
        Detected 'X64' type PE/COFF image consisting of 3 sections
        Section alignment:      0x40
        File alignment:         0x40
        Section '.text' @ 0x00000240
        File offset:            0x240
        Virtual size:           0x1f440
        Raw size:               0x1f440
        Section '.data' @ 0x0001f680
        File offset:            0x1f680
        Virtual size:           0x3640
        Raw size:               0x3640
        Section '.reloc' @ 0x00022cc0
        File offset:            0x22cc0
        Virtual size:           0x280
        Raw size:               0x280
    
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
    Reviewed-by: Liming Gao <liming....@intel.com>

commit 5217ea2ac20a5e957cfbb7925dccd432f6241ea2
Author: Vikas C Sajjan <vikas.cha.saj...@hpe.com>
Date:   Mon Aug 22 15:34:35 2016 +0530

    ArmVirtPkg: Fix build breakage of ArmVirtXen platform
    
    Added missing dependency of FileExplorerLib, which was causing
    build error for ArmVirtXen, due to inclusion of ramdisk support.
    
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Vikas C Sajjan <vikas.cha.saj...@hpe.com>
    Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>

commit 8866d337ea9eba258e942585b172d57d39376e70
Author: Liming Gao <liming....@intel.com>
Date:   Mon Aug 22 11:09:01 2016 +0800

    BaseTools PeCoffLib: Fix the issue to get RelocationsStripped from TE image
    
    If PE image has no relocation section, and has not set RELOCS_STRIPPED,
    after it is converted to TE image, GenFw will set its relocation section
    VirtualAddress to non-zero address, and keep Size value as Zero. MdePkg
    BasePeCoffLib applied this rule to get RelocationsStripped attribute. But,
    it is missing in BaseTools BasePeCoffLib.
    
    Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
    Cc: Yonghong Zhu <yonghong....@intel.com>
    Contributed-under: TianoCore Contribution Agreement 1.0
    Signed-off-by: Liming Gao <liming....@intel.com>
    Reviewed-by: Yonghong Zhu <yonghong....@intel.com>
    Tested-by: Ard Biesheuvel <ard.biesheu...@linaro.org>

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel

Reply via email to