flight 118721 xen-4.7-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118721/
Failures :-/ but no regressions.
Tests which are failing intermittently (not blocking):
test-xtf-amd64-amd64-2 49 xtf/test-hvm64-lbr-tsx-vmentry fail in 118664 pass
in 118721
flight 118707 xen-4.8-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118707/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-credit2 broken
test-amd64-amd64-xl-credit2 4
>
> It looks like DomR's vCPU does get 50% of CPU time, so it's not that
> other vCPUs are preventing it to exploit all its own reservation. If
> that would have not been the case, there'd be a bug in the scheduler.
>
> By giving the vCPU 100% (either via "budget == period" or with
> extratime),
branch xen-unstable
xenbranch xen-unstable
job test-amd64-amd64-xl-qemut-debianhvm-amd64-xsm
testid xen-boot
Tree: linux git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
Tree: linuxfirmware git://xenbits.xen.org/osstest/linux-firmware.git
Tree: qemu
flight 118698 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118698/
Failures :-/ but no regressions.
Regressions which are regarded as allowable (not blocking):
test-armhf-armhf-xl-rtds16 guest-start/debian.repeat fail REGR. vs. 118607
Tests which did not
On Fri, 2018-02-09 at 12:51 -0500, Meng Xu wrote:
> > On 09.02.18 17:36, Meng Xu wrote:
> > > Another way to check if there is interference from services in
> > > domR is
> > > to set period = budget for the domR's VCPUs.
> >
> > Could you please explain how setting budget equal to period would
>
Great, thank you!
On Fri, Feb 9, 2018 at 7:14 PM, Stefano Stabellini
wrote:
> Hi Mirela,
>
> We can use my conferencing details this time, so that we can do screen
> sharing easily:
>
> Join the call: https://www.uberconference.com/stefano-stabellini
> Optional dial
On Fri, Feb 9, 2018 at 10:59 AM, Juergen Gross wrote:
>
> Do you want me to setup the patches for pulling again?
No, I've pulled, I just don't want to see these unexplained merges again.
Preferably I don't want to see back-merges at all, but when I do see
them, I want to see an
flight 118683 xen-4.9-testing real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118683/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-armhf-armhf-xl-xsm 5 host-ping-check-native fail REGR. vs. 118524
Hi,
On 02/09/2018 02:38 PM, Andre Przywara wrote:
The VGIC model used for a domain (GICv2 or GICv3) determines the maximum
number of VCPUs for that guest, as GICv2 can only handle 8 processors.
In the moment we carry this per-VGIC-model limit in the vgic_ops,
alongside the model specific
Hi,
On 02/09/2018 02:38 PM, Andre Przywara wrote:
The prototype for gic_remove_from_lr_pending() is the last function in
gic.h which references a VGIC data structure.
Move it over to vgic.h, so that we can remove the inclusion of vgic.h
from gic.h. We add it to asm/domain.h instead, where it is
Hi,
AFAICT, patch #1-#6 were sent separately and were reviewed. I will skip
them for now, but please address the comments on the next version.
Cheers,
On 02/09/2018 02:38 PM, Andre Przywara wrote:
When creating a GICv3 devicetree node, we currently insert the
redistributor-stride and
Hi,
On 02/09/2018 07:10 PM, Stefano Stabellini wrote:
On Fri, 9 Feb 2018, Julien Grall wrote:
On 02/09/2018 07:02 PM, Stefano Stabellini wrote:
On Fri, 9 Feb 2018, Julien Grall wrote:
Hi,
On 02/08/2018 11:49 PM, Stefano Stabellini wrote:
On Thu, 1 Feb 2018, Julien Grall wrote:
On 1
On Fri, 9 Feb 2018, Julien Grall wrote:
> On 02/09/2018 07:02 PM, Stefano Stabellini wrote:
> > On Fri, 9 Feb 2018, Julien Grall wrote:
> > > Hi,
> > >
> > > On 02/08/2018 11:49 PM, Stefano Stabellini wrote:
> > > > On Thu, 1 Feb 2018, Julien Grall wrote:
> > > > > On 1 February 2018 at 19:37,
On 02/09/2018 07:02 PM, Stefano Stabellini wrote:
On Fri, 9 Feb 2018, Julien Grall wrote:
Hi,
On 02/08/2018 11:49 PM, Stefano Stabellini wrote:
On Thu, 1 Feb 2018, Julien Grall wrote:
On 1 February 2018 at 19:37, Stefano Stabellini
wrote:
On Tue, 30 Jan 2018,
On Fri, 9 Feb 2018, Julien Grall wrote:
> Hi,
>
> On 02/08/2018 11:49 PM, Stefano Stabellini wrote:
> > On Thu, 1 Feb 2018, Julien Grall wrote:
> > > On 1 February 2018 at 19:37, Stefano Stabellini
> > > wrote:
> > > > On Tue, 30 Jan 2018, Julien Grall wrote:
> > > > >
On 09/02/18 19:48, Linus Torvalds wrote:
> On Fri, Feb 9, 2018 at 6:28 AM, Juergen Gross wrote:
>>
>> git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git
>> for-linus-4.16-rc1-tag
>
> So I've pulled this, but the back-merges *really* annoy me.
>
> Seriously, DON'T DO
On Fri, Feb 9, 2018 at 6:28 AM, Juergen Gross wrote:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git
> for-linus-4.16-rc1-tag
So I've pulled this, but the back-merges *really* annoy me.
Seriously, DON'T DO MERGES IF YOU CANNOT EVEN BE BOTHERED TO WRITE A
REASON
Hi Mirela,
We can use my conferencing details this time, so that we can do screen
sharing easily:
Join the call: https://www.uberconference.com/stefano-stabellini
Optional dial in number: 669-999-0613
No PIN needed
I'll also reply to the first email from Julien in this thread with the
Hi,
I am slightly confused. I receive your answer on this e-mail after you
resend a version. So were the comments on RFC v4 was addressed?
On 02/09/2018 05:56 PM, Sameer Goel wrote:
/* Request interrupt lines */
irq = smmu->evtq.q.irq;
@@ -2316,9 +2782,13 @@ static int
Thank you, I'll take a look.
On 09.02.18 19:53, Meng Xu wrote:
Sure!
It's attached.
Meng
--
*Andrii Anisov*
___
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel
Hi Juilen
Time works for us.
Do you think it is worth to discuss certification & AGL stuff?
Best regards,
-- Artem Mygaiev
From: Mirela Simonovic
Sent: Friday, February 9, 2018 7:53:28 PM
To: Edgar Iglesias
Cc: Julien Grall; Stefano
On 1/23/2018 8:18 AM, Julien Grall wrote:
> Hi Sameer,
>
> On 19/12/17 03:17, Sameer Goel wrote:
>> + if (!dtprop)
>> + return -EINVAL;
>> +
>> + if (!dtprop->value)
>> + return -ENODATA;
>> + }
>> +
>> + return ret;
>> +}
>> +
>> +/*
>> + * Xen: Helpers
On 1/23/2018 9:51 AM, Roger Pau Monné wrote:
> On Mon, Dec 18, 2017 at 08:16:58PM -0700, Sameer Goel wrote:
>> For porting files directly from Linux it is useful to have a function mapping
>> definitions from Linux to Xen. This file adds common API functions and
>> other defines that are needed
On 2/9/2018 3:51 AM, Julien Grall wrote:
>
>>
>>> diff --git a/xen/drivers/passthrough/arm/smmu.c
>>> b/xen/drivers/passthrough/arm/smmu.c
>>> index ad956d5b8d..4c04391e21 100644
>>> --- a/xen/drivers/passthrough/arm/smmu.c
>>> +++ b/xen/drivers/passthrough/arm/smmu.c
>>> @@ -41,6 +41,7 @@
>>>
Hi,
The proposed time works for me too. We would like to show you a demo, i. e.
Xen suspend/resume in action on Xilinx's Zynq US+ MPSoC. I would need ~10
minutes for that.
However, I need to screen share, so would it be possible to setup a call
with the screen-sharing capability?
Thanks,
Mirela
On Sat, Feb 10, 2018 at 01:21:09AM +0800, Chao Gao wrote:
> On Fri, Feb 09, 2018 at 04:39:15PM +, Roger Pau Monné wrote:
> >On Fri, Nov 17, 2017 at 02:22:15PM +0800, Chao Gao wrote:
> >> This patch adds VVTD MMIO handler to deal with MMIO access.
> >>
> >> Signed-off-by: Chao Gao
On Fri, Feb 9, 2018 at 10:56 AM, Andrii Anisov wrote:
> Hello Meng Xu,
>
>
> On 09.02.18 17:36, Meng Xu wrote:
>>
>> Another way to check if there is interference from services in domR is
>> to set period = budget for the domR's VCPUs.
>
> Could you please explain how
On Fri, Nov 17, 2017 at 02:22:18PM +0800, Chao Gao wrote:
> When a remapping interrupt request arrives, remapping hardware computes the
> interrupt_index per the algorithm described in VTD spec
> "Interrupt Remapping Table", interprets the IRTE and generates a remapped
> interrupt request.
>
>
flight 118672 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/118672/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-amd64-amd64-xl-qemut-debianhvm-amd64-xsm 7 xen-boot fail REGR. vs. 118324
On Fri, Feb 09, 2018 at 04:27:54PM +, Roger Pau Monné wrote:
>On Fri, Nov 17, 2017 at 02:22:14PM +0800, Chao Gao wrote:
>> This patch adds create/destroy function for the emulated VTD
>> and adapts it to the common VIOMMU abstraction.
>>
>> As the Makefile is changed here, put all files in
On Fri, Nov 17, 2017 at 02:22:17PM +0800, Chao Gao wrote:
> Software writes this field to enable/disable interrupt reampping. This
> patch emulate IRES field of GCMD. Currently, Guest's whole IRT are
> mapped to Xen permanently for the latency of delivering interrupt. And
> the old mapping is
On 02/09/2018 05:04 PM, Volodymyr Babchuk wrote:
Julien,
On 08.02.18 21:21, Julien Grall wrote:
PSCI 1.0 and later allows the SMCCC version to be (indirectly) probed
via PSCI_FEATURES. If the PSCI_FEATURES does not exist (PSCI 0.2 or
earlier) and the function return an error, then we
Julien,
On 08.02.18 21:21, Julien Grall wrote:
PSCI 1.0 and later allows the SMCCC version to be (indirectly) probed
via PSCI_FEATURES. If the PSCI_FEATURES does not exist (PSCI 0.2 or
earlier) and the function return an error, then we considered SMCCC 1.0
is implemented.
Signed-off-by:
On Fri, Nov 17, 2017 at 02:22:16PM +0800, Chao Gao wrote:
> Software sets SIRTP field of GCMD to set/update the interrupt remapping
> table pointer used by hardware. The interrupt remapping table pointer is
> specified through the Interrupt Remapping Table Address (IRTA_REG)
> register.
>
> This
On Fri, Feb 09, 2018 at 03:17:59PM +, Roger Pau Monné wrote:
>On Fri, Nov 17, 2017 at 02:22:13PM +0800, Chao Gao wrote:
>> This patch contains following changes:
>> - align register definitions
>> - use MASK_EXTR to define some macros about extended capabilies
>> rather than open-coding the
On Fri, Feb 09, 2018 at 03:11:25PM +, Roger Pau Monné wrote:
>On Fri, Nov 17, 2017 at 02:22:12PM +0800, Chao Gao wrote:
>> From: Lan Tianyu
>>
>> This patch is to add callback for vIOAPIC and vMSI to check whether interrupt
>> remapping is enabled.
>
>Same as with the
On 09.02.18 18:15, Julien Grall wrote:
On 02/09/2018 04:08 PM, Volodymyr Babchuk wrote:
Hi,
Hi Volodymyr,
Thank you for the review. I have noticed that your e-mail client seem to
mess up with the e-mail sent sometimes (see below). You may want to
configure it to avoid that.
Oops, sorry
On 08.02.18 21:21, Julien Grall wrote:
This will make easier to know whether BP hardening has been enabled for
a CPU and which method is used.
Signed-off-by: Julien Grall
Reviewed-by: Volodymyr Babchuk
---
Changes in v2:
-
On Fri, Feb 09, 2018 at 05:32:47PM +0100, Marek Marczykowski-Górecki wrote:
> On Fri, Feb 09, 2018 at 03:33:40PM +, Roger Pau Monné wrote:
> > I'm sorry, I'm a little foggy today. Does this mean the call to
> > libxl__xs_path_cleanup is simply not needed in
> >
On Fri, Feb 9, 2018 at 1:10 PM, Alexandru Stefan ISAILA
wrote:
> On Jo, 2018-02-08 at 11:06 -0700, Tamas K Lengyel wrote:
>> On Thu, Feb 8, 2018 at 8:25 AM, Alexandru Isaila
>> wrote:
>> >
>> > This commit enables controlregister events for svm.
On 08.02.18 21:22, Julien Grall wrote:
Xen is printing the same way the PSCI version for 0.1, 0.2 and later.
The only different is the former is hardcoded.
Furthermore PSCI is now used for other things than SMP bring up. So only
print the PSCI version in psci_init.
Signed-off-by: Julien
On 08.02.18 21:22, Julien Grall wrote:
A bunch of PSCI functions are not prefixed with static despite no one is
using them outside the file and the prototype is not available in
psci.h.
Signed-off-by: Julien Grall
Reviewed-by: Volodymyr Babchuk
On Fri, Nov 17, 2017 at 02:22:15PM +0800, Chao Gao wrote:
> This patch adds VVTD MMIO handler to deal with MMIO access.
>
> Signed-off-by: Chao Gao
> Signed-off-by: Lan Tianyu
> ---
> v4:
> - only trap the register emulated in vvtd_in_range().
>
On Fri, Feb 09, 2018 at 03:06:07PM +, Roger Pau Monné wrote:
>On Fri, Nov 17, 2017 at 02:22:11PM +0800, Chao Gao wrote:
>> From: Lan Tianyu
>>
>> This patch is to add get_irq_info callback for platform implementation
>> to convert irq remapping request to irq info (E,G
On Fri, Feb 09, 2018 at 03:33:40PM +, Roger Pau Monné wrote:
> I'm sorry, I'm a little foggy today. Does this mean the call to
> libxl__xs_path_cleanup is simply not needed in
> libxl__initiate_device_generic_remove?
It is, it's an alternative to setting be/state=XenbusStateClosing, when
On Fri, Nov 17, 2017 at 02:22:14PM +0800, Chao Gao wrote:
> This patch adds create/destroy function for the emulated VTD
> and adapts it to the common VIOMMU abstraction.
>
> As the Makefile is changed here, put all files in alphabetic order
> by this chance.
>
> Signed-off-by: Chao Gao
On Thu, Feb 8, 2018 at 8:25 AM, Alexandru Isaila
wrote:
> This commit enables controlregister events for svm.
>
> Signed-off-by: Alexandru Isaila
Acked-by: Tamas K Lengyel
> ---
> xen/arch/x86/hvm/svm/svm.c| 11
On Fri, Feb 9, 2018 at 6:10 AM, Alexandru Stefan ISAILA
wrote:
> On Jo, 2018-02-08 at 11:06 -0700, Tamas K Lengyel wrote:
>> On Thu, Feb 8, 2018 at 8:25 AM, Alexandru Isaila
>> wrote:
>> >
>> > This commit enables controlregister events for svm.
On Fri, Feb 9, 2018 at 6:21 AM, Arnd Bergmann wrote:
> On Fri, Feb 9, 2018 at 3:13 PM, David Laight wrote:
>> From: Arnd Bergmann
>>> Sent: 09 February 2018 12:58
>> ...
>>> However, aside from this driver, I wonder if we should be worried about
>>>
On Fri, Feb 09, 2018 at 02:33:57PM +, Roger Pau Monné wrote:
>On Fri, Nov 17, 2017 at 02:22:09PM +0800, Chao Gao wrote:
>> From: Lan Tianyu
>>
>> This patch is to introduce an abstract layer for arch vIOMMU implementation
>> and vIOMMU domctl to deal with requests from
On 02/09/2018 04:08 PM, Volodymyr Babchuk wrote:
Hi,
Hi Volodymyr,
Thank you for the review. I have noticed that your e-mail client seem to
mess up with the e-mail sent sometimes (see below). You may want to
configure it to avoid that.
Cheers,
On 08.02.18 21:21, Julien Grall wrote:
On 02/09/2018 04:07 PM, Volodymyr Babchuk wrote:
Hi Julien,
Hi Volodymyr,
On 08.02.18 21:21, Julien Grall wrote:
At the moment, Xen provides virtual PSCI interface compliant with 0.1
and 0.2. Since them, the specification has been updated and the latest
version is 1.1 (see ARM DEN 0022D).
On 08.02.18 21:21, Julien Grall wrote:
Add macros SMCCC_VERSION, SMCCC_VERSION_{MINOR, MAJOR} to easily convert
between a 32-bit value and a version number. The encoding is based on
2.2.2 in "Firmware interfaces for mitigation CVE-2017-5715" (ARM DEN 0070A).
Also re-use them to define
Hi,
On 08.02.18 21:21, Julien Grall wrote:
The new SMC Calling Convention (v1.1) allows for a reduced overhead
when calling into the firmware, and provides a new feature discovery
mechanism. See "Firmware interfaces for mitigating CVE-2017-5715" ARM
DEN 00070A.
Signed-off-by: Julien Grall
Hi Julien,
On 08.02.18 21:21, Julien Grall wrote:
At the moment, Xen provides virtual PSCI interface compliant with 0.1
and 0.2. Since them, the specification has been updated and the latest
version is 1.1 (see ARM DEN 0022D).
From an implementation point of view, only PSCI_FEATURES is
On 09.02.18 17:34, Meng Xu wrote:
If you want to keep the same VCPU parameter, can you try to set task's
period = 100ms and exe time = 40ms?
By theory (I used CARTS to compute), a VCPU (10ms, 5ms) can schedule a
task (100ms, 40ms).
Note that the resource demand of two RT tasks with the same
On Fri, Feb 09, 2018 at 12:54:11PM +, Roger Pau Monné wrote:
>On Fri, Nov 17, 2017 at 02:22:08PM +0800, Chao Gao wrote:
>> From: Lan Tianyu
>>
>> This patch is to add Xen virtual IOMMU doc to introduce motivation,
>> framework, vIOMMU hypercall and xl configuration.
>>
Hello Meng Xu,
On 09.02.18 17:36, Meng Xu wrote:
Another way to check if there is interference from services in domR is
to set period = budget for the domR's VCPUs.
Could you please explain how setting budget equal to period would help
discover any interferences from services in the domain?
Hello Meng Xu,
Thank you for your explanation.
On 09.02.18 17:34, Meng Xu wrote:
To make sure no deadline miss of a task on a VCPU, we must guarantee:
1) The VCPU gets its configured time, which is shown in your following
emails that it does;
2) When the VCPU gets its configured time, the
> -Original Message-
> From: Ross Lagerwall [mailto:ross.lagerw...@citrix.com]
> Sent: 09 February 2018 15:49
> To: Paul Durrant ; xen-de...@lists.xen.org
> Cc: Jan Beulich ; Andrew Cooper
>
> Subject: Re: [PATCH]
On 02/09/2018 03:42 PM, Paul Durrant wrote:
-Original Message-
From: Ross Lagerwall [mailto:ross.lagerw...@citrix.com]
Sent: 09 February 2018 15:34
To: xen-de...@lists.xen.org
Cc: Ross Lagerwall ; Jan Beulich
; Andrew Cooper
On 09/02/18 15:42, Paul Durrant wrote:
>> -Original Message-
>> From: Ross Lagerwall [mailto:ross.lagerw...@citrix.com]
>> Sent: 09 February 2018 15:34
>> To: xen-de...@lists.xen.org
>> Cc: Ross Lagerwall ; Jan Beulich
>> ; Andrew Cooper
On Fri, Feb 9, 2018 at 10:18 AM, Dario Faggioli wrote:
>
> On Fri, 2018-02-09 at 17:03 +0200, Andrii Anisov wrote:
> > > If DomR is not able to get its share, then we have an issue/bug in
> > > the
> > > scheduler. If it does, then the scheduler is doing its job, and the
> > >
dm_op() fails with -EFAULT if the struct xen_dm_op given by the guest is
smaller than Xen's struct xen_dm_op. This is a problem because DMOP is
meant to be a stable ABI but it breaks whenever the size of struct
xen_dm_op changes.
To fix this, change how the copying to and from the guest is done.
On Fri, Feb 9, 2018 at 7:20 AM, Andrii Anisov
wrote:
> Dear Dario,
>
> Now I'm experimenting with RTDS, in particular with "extra time"
> functionality.
>
> My experimental setup is built on Salvator-X board with H3 SOC (running
> only big cores cluster, 4xA57).
> Domains
On Fri, Feb 09, 2018 at 04:11:06PM +0100, Marek Marczykowski-Górecki wrote:
> On Fri, Feb 09, 2018 at 02:39:08PM +, Roger Pau Monné wrote:
> > On Fri, Feb 09, 2018 at 02:08:33PM +0100, Marek Marczykowski-Górecki wrote:
> > > On Fri, Feb 09, 2018 at 12:10:39PM +, Roger Pau Monné wrote:
> >
On Fri, 2018-02-09 at 17:03 +0200, Andrii Anisov wrote:
> > If DomR is not able to get its share, then we have an issue/bug in
> > the
> > scheduler. If it does, then the scheduler is doing its job, and the
> > issue may be somewhere else (e.g., something inside the guest may
> > eat
> > some of
On Fri, Nov 17, 2017 at 02:22:13PM +0800, Chao Gao wrote:
> This patch contains following changes:
> - align register definitions
> - use MASK_EXTR to define some macros about extended capabilies
> rather than open-coding the masks
> - define fields of FECTL and FESTS as uint32_t rather than u64
On Fri, Nov 17, 2017 at 02:22:12PM +0800, Chao Gao wrote:
> From: Lan Tianyu
>
> This patch is to add callback for vIOAPIC and vMSI to check whether interrupt
> remapping is enabled.
Same as with the previous patches, not adding the actual code in
check_irq_remapping makes
On Fri, Feb 09, 2018 at 02:39:08PM +, Roger Pau Monné wrote:
> On Fri, Feb 09, 2018 at 02:08:33PM +0100, Marek Marczykowski-Górecki wrote:
> > On Fri, Feb 09, 2018 at 12:10:39PM +, Roger Pau Monné wrote:
> > > On Fri, Feb 09, 2018 at 12:41:58PM +0100, Marek Marczykowski-Górecki
> > >
On Fri, Nov 17, 2017 at 02:22:11PM +0800, Chao Gao wrote:
> From: Lan Tianyu
>
> This patch is to add get_irq_info callback for platform implementation
> to convert irq remapping request to irq info (E,G vector, dest, dest_mode
> and so on).
>
> Signed-off-by: Lan Tianyu
Hello Dario,
On 09.02.18 15:18, Dario Faggioli wrote:
Ok, so you're giving:
- 40% CPU time to Domain-0
- 50% CPU time to DomR
- 40% CPU time to DomA
- 40% CPU time to DomD
total utilization is 170%. As far as I've understood you have 4 CPUs,
right? If yes, there *should* be no problems. (Well,
The VGIC supports virtual IRQs to be connected to a hardware IRQ, so
when a guest EOIs the virtual interrupt, it affects the state of that
corresponding interrupt on the hardware side at the same time.
Implement the interface that the Xen arch/core code expects to connect
the virtual and the
The config register handlers are shared between the v2 and v3 emulation,
so their implementation goes into vgic-mmio.c, to be easily referenced
from the v3 emulation as well later.
This is based on Linux commit 79717e4ac09c, written by Andre Przywara.
Signed-off-by: Andre Przywara
The pending register handlers are shared between the v2 and v3
emulation, so their implementation goes into vgic-mmio.c, to be easily
referenced from the v3 emulation as well later.
For level triggered interrupts the real line level is unaffected by
this write, so we keep this state separate and
This patch implements the function which is called by Xen when it wants
to register the virtual GIC.
Signed-off-by: Andre Przywara
---
xen/arch/arm/vgic/vgic-init.c | 62 +++
xen/arch/arm/vgic/vgic.h | 3 +++
2 files
Enable the VGIC operation by properly initialising the registers
in the hypervisor GIC interface.
This is based on Linux commit f7b6985cc3d0, written by Eric Auger.
Signed-off-by: Andre Przywara
---
xen/arch/arm/vgic/vgic-v2.c | 13 +
The Xen core code requires an interrupt controller emulation to implement
arch_move_irqs(), to move the affinity of an hardware mapped virtual IRQ
to another core. In the moment we don't implement this
physical-follow-virtual regime in our new VGIC, so just provide an empty
stub implementation to
The Xen arch code traps system registers writes from the guest and will
relay anything GIC related to the VGIC.
Since this affects only GICv3 (which we don't yet emulate), provide a
stub implementation of vgic_emulate() for now.
Signed-off-by: Andre Przywara
---
The priority register handlers are shared between the v2 and v3 emulation,
so their implementation goes into vgic-mmio.c, to be easily referenced
from the v3 emulation as well later.
There is a corner case when we change the priority of a pending
interrupt which we don't handle at the moment.
When we dump guest state on the Xen console, we also print the state of
IRQs that are on a VCPU.
Add the code to dump the state of an IRQ handled by the new VGIC.
Signed-off-by: Andre Przywara
---
xen/arch/arm/vgic/vgic.c | 13 +
1 file changed, 13
Now that we have both the old VGIC prepared to cope with a sibling and
the code for the new VGIC in place, lets add a Kconfig option to enable
the new code and wire it into the Xen build system.
This will add a compile time option to use either the "old" or the "new"
VGIC.
In the moment this is
To find an unused virtual IRQ number Xen uses a scheme to track used
virtual IRQs.
Implement this interface in the new VGIC to make the Xen core/arch code
happy.
This is actually somewhat VGIC agnostic, so is mostly a copy of the code
from the old VGIC. But it has to live in the VGIC files, so we
Provide a vgic_queue_irq_unlock() function which decides whether a
given IRQ needs to be queued to a VCPU's ap_list.
This should be called whenever an IRQ becomes pending or enabled,
either as a result of a hardware IRQ injection, from devices emulated by
Xen (like the architected timer) or from
Currently vgic.h both contains prototypes used by Xen arch code outside
of the actual VGIC (for instance vgic_vcpu_inject_irq()), and prototypes
for functions used by the VGIC internally.
Group them to later allow an easy split with one #ifdef.
Signed-off-by: Andre Przywara
Tell Xen whether a particular VCPU has an IRQ that needs handling
in the guest. This is used to decide whether a VCPU is runnable.
This is based on Linux commit 90eee56c5f90, written by Eric Auger.
Signed-off-by: Andre Przywara
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xen/arch/arm/vgic/vgic.c | 32
Triggering an IPI via this register is v2 specific, so the
implementation lives entirely in vgic-mmio-v2.c.
This is based on Linux commit 55cc01fb9004, written by Andre Przywara.
Signed-off-by: Andre Przywara
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xen/arch/arm/vgic/vgic-mmio-v2.c | 47
Adds the sorting function to cover the case where you have more IRQs
to consider than you have LRs. We consider their priorities.
This pulls in Linux' list_sort.c , which is a merge sort implementation
for linked lists.
This is based on Linux commit 8e4447457965, written by Christoffer Dall.
When creating a GICv3 devicetree node, we currently insert the
redistributor-stride and #redistributor-regions properties, with fixed
values which are actually the architected ones. But those properties are
optional and only needed to cover for broken platforms, where the values
differ from the
map_resources is the last initialization step needed before the first
VCPU is run. At that stage the code stores the MMIO base addresses used.
Also it registers the respective register frames with the MMIO framework.
This is based on Linux commit cbae53e663ea, written by Eric Auger.
The Xen core/arch code relies on two abstracted functions to inject an
event channel IRQ and to query its pending state.
Implement those to query the state of the new VGIC implementation.
Signed-off-by: Andre Przywara
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xen/arch/arm/vgic/vgic.c | 20
At the moment we allocate exactly one page for struct vcpu on ARM, also
have a check in place to prevent it growing beyond 4KB.
As the struct includes the state of all 32 private (per-VCPU) interrupts,
we are at 3840 bytes on arm64 at the moment already. Growing the per-IRQ
VGIC structure even
Create vgic-mmio-v2.c to describe GICv2 emulation specific handlers
using the initializer macros provided by the VGIC MMIO framework.
Provide a function to register the GICv2 distributor registers to
the Xen MMIO framework.
The actual handler functions are still stubs in this patch.
This is based
This patch allocates and initializes the data structures used to model
the vgic distributor and virtual cpu interfaces. At that stage the
number of IRQs and number of virtual CPUs is frozen.
This is based on Linux commit ad275b8bb1e6, written by Eric Auger.
Signed-off-by: Andre Przywara
As the enable register handlers are shared between the v2 and v3
emulation, their implementation goes into vgic-mmio.c, to be easily
referenced from the v3 emulation as well later.
Signed-off-by: Andre Przywara
---
xen/arch/arm/vgic/vgic-mmio-v2.c | 4 +-
Instead of hard coding the architected redistributor stride into the
code, lets use a clear #define to the two values for GICv3 and GICv4 and
clarify the algorithm to determine the needed stride value.
Signed-off-by: Andre Przywara
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xen/arch/arm/gic-v3.c
Add a new header file for the new and improved GIC implementation.
The big change is that we now have a struct vgic_irq per IRQ instead
of spreading all the information over various bitmaps in the ranks.
We include this new header conditionally from within the old header
file for the time being
Implement the framework for syncing IRQs between our emulation and the
list registers, which represent the guest's view of IRQs.
This is done in kvm_vgic_flush_hwstate and kvm_vgic_sync_hwstate, which
gets called on guest entry and exit.
The code talking to the actual GICv2/v3 hardware is added in
Add an MMIO handling framework to the VGIC emulation:
Each register is described by its offset, size (or number of bits per
IRQ, if applicable) and the read/write handler functions. We provide
initialization macros to describe each GIC register later easily.
Separate dispatch functions for read
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