On 11/14/2023 5:20 PM, Stefano Stabellini wrote:
> On Tue, 14 Nov 2023, Robin Murphy wrote:
>> On 11/11/2023 6:45 pm, Chuck Zmudzinski wrote:
>> > Enabling the new option, ARM_DMA_USE_IOMMU_XEN, fixes this error when
>> > attaching the Exynos mixer in Linux dom0 on Xen on the Chromebook Snow
>> > (
flight 183786 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183786/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 15 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm 1
Pipeline #1076994458 has passed!
Project: xen ( https://gitlab.com/xen-project/xen )
Branch: staging ( https://gitlab.com/xen-project/xen/-/commits/staging )
Commit: 98758ae4 (
https://gitlab.com/xen-project/xen/-/commit/98758ae48974d6d24f999e4d9324e463d326f66f
)
Commit Message: xen: introduc
Pipeline #1076983423 has passed!
Project: xen ( https://gitlab.com/xen-project/xen )
Branch: staging ( https://gitlab.com/xen-project/xen/-/commits/staging )
Commit: 83e9e305 (
https://gitlab.com/xen-project/xen/-/commit/83e9e305103ef00ba3b546657d47c4aa85899cff
)
Commit Message: automation/ec
flight 183783 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183783/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-arm64-arm64-examine 8 reboot fail REGR. vs. 183766
test-arm64-arm64-li
On Fri, 17 Nov 2023, Federico Serafini wrote:
> Add missing parameter names. No functional change.
>
> Signed-off-by: Federico Serafini
Reviewed-by: Stefano Stabellini
On Fri, 17 Nov 2023, Federico Serafini wrote:
> Add missing parameter names. No functional change.
>
> Signed-off-by: Federico Serafini
Reviewed-by: Stefano Stabellini
On Fri, 17 Nov 2023, Federico Serafini wrote:
> Add missing parameter names. No functional change.
>
> Signed-off-by: Federico Serafini
> ---
> xen/include/xen/sort.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/xen/include/xen/sort.h b/xen/include/xen/sort.h
> i
On Fri, Nov 17, 2023 at 11:12:37AM +0100, Neowutran wrote:
> On 2023-11-07 11:11, Elliott Mitchell wrote:
> > On Mon, Oct 30, 2023 at 04:27:22PM +01
> > > On Mon, Oct 30, 2023 at 07:50:27AM -0700, Elliott Mitchell wrote:
> > > > On Tue, Oct 24, 2023 at 03:51:50PM +0200, Roger Pau Monne wrote:
> > >
On Fri, 17 Nov 2023, Federico Serafini wrote:
> Add missing parameter names. No functional change.
>
> Signed-off-by: Federico Serafini
Reviewed-by: Stefano Stabellini
On Fri, 17 Nov 2023, Federico Serafini wrote:
> diff --git a/xen/common/stop_machine.c b/xen/common/stop_machine.c
> index 3adbe380de..398cfd507c 100644
> --- a/xen/common/stop_machine.c
> +++ b/xen/common/stop_machine.c
> @@ -46,7 +46,7 @@ struct stopmachine_data {
>
> unsigned int fn_cpu;
On Fri, 17 Nov 2023, Julien Grall wrote:
> On 16/11/2023 09:15, Nicola Vetrini wrote:
> > On 2023-11-16 10:08, Nicola Vetrini wrote:
> > > The comment-based justifications for MISRA C:2012 Rule 8.4 are replaced
> > > by the asmlinkage pseudo-attribute, for the sake of uniformity.
> > >
> > > Add m
On Fri, 17 Nov 2023, Andrew Cooper wrote:
> On 17/11/2023 10:17 am, Nicola Vetrini wrote:
> > Hi all,
> >
> > As discussed in this thread [1], which is about complying with MISRA C
> > Rule 10.1,
> > a macro was introduced to encapsulate a well-known construct:
> >
> > /*
> > * Given an unsigned i
On Fri, 17 Nov 2023, Federico Serafini wrote:
> On 27/10/23 00:55, Stefano Stabellini wrote:
> > +Roger
> >
> > See below
> >
> > On Thu, 26 Oct 2023, Julien Grall wrote:
> > > On 26/10/2023 15:04, Federico Serafini wrote:
> > > > On 26/10/23 15:54, Julien Grall wrote:
> > > > > Hi,
> > > > >
>
On Fri, 17 Nov 2023, Federico Serafini wrote:
> On 20/10/23 08:35, Jan Beulich wrote:
> > On 19.10.2023 18:26, Stefano Stabellini wrote:
> > > On Thu, 19 Oct 2023, Jan Beulich wrote:
> > > > On 19.10.2023 00:43, Stefano Stabellini wrote:
> > > > > On Mon, 16 Oct 2023, Jan Beulich wrote:
> > > > > >
On Fri, 17 Nov 2023, Julien Grall wrote:
> Hi Federico,
>
> On 17/11/2023 08:28, Federico Serafini wrote:
> > Introduce function type bug_fn_t. This improves readability and helps
> > to validate that the function passed to run_in_exception_handle() has
> > the expected prototype.
> Hmmm... I read
On Fri, 17 Nov 2023, Roger Pau Monné wrote:
> On Thu, Nov 16, 2023 at 05:14:23PM -0800, Stefano Stabellini wrote:
> > On Thu, 16 Nov 2023, Roger Pau Monne wrote:
> > > Instead of using specific architecture image, switch to using multi-arch
> > > ones
> > > and specify the desired architecture usi
On Fri, 17 Nov 2023, Roger Pau Monné wrote:
> On Thu, Nov 16, 2023 at 05:05:28PM -0800, Stefano Stabellini wrote:
> > On Thu, 16 Nov 2023, Roger Pau Monne wrote:
> > > The gitlab CI webpage seems to have issues displaying the \CR\CR\LF
> > > "\r\r\n"
> > > sequence on the web interface used as lin
On Fri, 17 Nov 2023, Julien Grall wrote:
> Hi,
>
> On 16/11/2023 08:45, Nicola Vetrini wrote:
> > On 2023-11-15 12:22, Julien Grall wrote:
> > > Hi,
> > >
> > > On 15/11/2023 11:02, Nicola Vetrini wrote:
> > > > On 2023-11-14 23:12, Julien Grall wrote:
> > > > > Hi,
> > > > >
> > > > > On 14/11/
On Fri, 17 Nov 2023, Nicola Vetrini wrote:
> Hi Jan,
>
> > > > > > While I've committed this patch (hoping that I got the necessary
> > > > > > context
> > > > > > adjustment right for the
> > > > > > automation/eclair_analysis/ECLAIR/deviations.ecl
> > > > > > change), I'd like to come back to th
On Fri, 17 Nov 2023, Volodymyr Babchuk wrote:
> > On Fri, 17 Nov 2023, Volodymyr Babchuk wrote:
> >> Hi Julien,
> >>
> >> Julien Grall writes:
> >>
> >> > Hi Volodymyr,
> >> >
> >> > On 17/11/2023 14:09, Volodymyr Babchuk wrote:
> >> >> Hi Stefano,
> >> >> Stefano Stabellini writes:
> >> >>
>
flight 183781 xen-unstable real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183781/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-armhf-armhf-libvirt 16 saverestore-support-checkfail like 183775
test-amd64-amd64-xl-qemut-win7-amd64
Hi Stefano,
Stefano Stabellini writes:
> On Fri, 17 Nov 2023, Volodymyr Babchuk wrote:
>> Hi Julien,
>>
>> Julien Grall writes:
>>
>> > Hi Volodymyr,
>> >
>> > On 17/11/2023 14:09, Volodymyr Babchuk wrote:
>> >> Hi Stefano,
>> >> Stefano Stabellini writes:
>> >>
>> >>> On Fri, 17 Nov 2023
On Fri, 17 Nov 2023, Volodymyr Babchuk wrote:
> Hi Julien,
>
> Julien Grall writes:
>
> > Hi Volodymyr,
> >
> > On 17/11/2023 14:09, Volodymyr Babchuk wrote:
> >> Hi Stefano,
> >> Stefano Stabellini writes:
> >>
> >>> On Fri, 17 Nov 2023, Volodymyr Babchuk wrote:
> > I still think, no matt
flight 183784 xen-unstable-smoke real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183784/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-amd64-amd64-libvirt 15 migrate-support-checkfail never pass
test-arm64-arm64-xl-xsm 1
On Fri, 17 Nov 2023, Fr. Chuck Zmudzinski, C.P.M. wrote:
> On 11/14/2023 5:20 PM, Stefano Stabellini wrote:
> > On Tue, 14 Nov 2023, Robin Murphy wrote:
> >> On 11/11/2023 6:45 pm, Chuck Zmudzinski wrote:
> >> > Enabling the new option, ARM_DMA_USE_IOMMU_XEN, fixes this error when
> >> > attaching
Hi Julien,
Julien Grall writes:
> Hi Volodymyr,
>
> On 17/11/2023 14:09, Volodymyr Babchuk wrote:
>> Hi Stefano,
>> Stefano Stabellini writes:
>>
>>> On Fri, 17 Nov 2023, Volodymyr Babchuk wrote:
> I still think, no matter the BDF allocation scheme, that we should try
> to avoid as m
Pipeline #1076704625 has passed!
Project: xen ( https://gitlab.com/xen-project/xen )
Branch: staging ( https://gitlab.com/xen-project/xen/-/commits/staging )
Commit: 97f8555a (
https://gitlab.com/xen-project/xen/-/commit/97f8555acbf3da013ed713ca0bbe739d41c48da9
)
Commit Message: xenstored: pr
Adapt arm's earlyfdt parsing code to ppc64 and enable Xen's early boot
allocator. Routines for parsing arm-specific devicetree nodes (e.g.
multiboot) were excluded, reducing the overall footprint of code that
was copied.
Signed-off-by: Shawn Anastasio
---
xen/arch/ppc/Makefile| 1 +
Hi,
On 16/11/2023 08:45, Nicola Vetrini wrote:
On 2023-11-15 12:22, Julien Grall wrote:
Hi,
On 15/11/2023 11:02, Nicola Vetrini wrote:
On 2023-11-14 23:12, Julien Grall wrote:
Hi,
On 14/11/2023 15:36, Nicola Vetrini wrote:
To be able to check for the existence of the necessary subsections
Hi Nicola,
On 16/11/2023 09:15, Nicola Vetrini wrote:
On 2023-11-16 10:08, Nicola Vetrini wrote:
The comment-based justifications for MISRA C:2012 Rule 8.4 are replaced
by the asmlinkage pseudo-attribute, for the sake of uniformity.
Add missing 'xen/compiler.h' #include-s where needed.
The te
Hi Volodymyr,
On 17/11/2023 14:09, Volodymyr Babchuk wrote:
Hi Stefano,
Stefano Stabellini writes:
On Fri, 17 Nov 2023, Volodymyr Babchuk wrote:
I still think, no matter the BDF allocation scheme, that we should try
to avoid as much as possible to have two different PCI Root Complex
emulat
Hi Sergiy,
On 17/11/2023 13:19, Sergiy Kibrik wrote:
+ */
+#define GUEST_VIRTIO_PCI_ECAM_BASE xen_mk_ullong(0x3300)
+#define GUEST_VIRTIO_PCI_TOTAL_ECAM_SIZE xen_mk_ullong(0x0100)
+#define GUEST_VIRTIO_PCI_HOST_ECAM_SIZE xen_mk_ullong(0x0020)
+
+/* 64 MB is reserved f
On Fri, Nov 17, 2023 at 01:40:37PM +0100, Roger Pau Monné wrote:
> On Wed, Sep 13, 2023 at 10:35:46AM -0400, Stewart Hildebrand wrote:
> > {
> > -uint32_t val;
> > -
> > val = r->read(pdev, r->offset, r->private);
> > +val &= ~r->rw1c_mask;
> > data = merge_re
flight 183779 libvirt real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183779/
Failures :-/ but no regressions.
Tests which did not succeed, but are not blocking:
test-armhf-armhf-libvirt-qcow2 15 saverestore-support-check fail like 183734
test-armhf-armhf-libvirt-raw 15 saveresto
On 2023-11-17 11:17, Nicola Vetrini wrote:
Hi all,
As discussed in this thread [1], which is about complying with MISRA C
Rule 10.1,
a macro was introduced to encapsulate a well-known construct:
/*
* Given an unsigned integer argument, expands to a mask where just the
least
* significant n
On 2023-11-17 12:39, Jan Beulich wrote:
On 17.11.2023 11:17, Nicola Vetrini wrote:
Hi all,
As discussed in this thread [1], which is about complying with MISRA C
Rule 10.1,
a macro was introduced to encapsulate a well-known construct:
/*
* Given an unsigned integer argument, expands to a mas
flight 183778 linux-linus real [real]
http://logs.test-lab.xenproject.org/osstest/logs/183778/
Regressions :-(
Tests which did not succeed and are blocking,
including tests which could not be run:
test-arm64-arm64-examine 8 reboot fail REGR. vs. 183766
test-arm64-arm64-li
The MMU specific code in head.S will not be used on MPU systems.
Instead of introducing more #ifdefs which will bring complexity
to the code, move MMU related code to mmu/head.S and keep common
code in head.S. Two notes while moving:
- As "fail" in original head.S is very simple and this name is t
Hi,
These are the set of patches based on top of
"[PATCH v9 0/8] xen/arm: Split MMU code as the prepration of MPU work".
This is the preparation work to add MPU support on Arm32.
Changes from :-
v1 - Dropped "[XEN v1 1/4] xen/arm: arm32: Move pt_enforce_wxn() so that it can
be bundled with oth
All the MMU related functionality have been clubbed together in
enable_boot_cpu_mm() for booting primary cpu and enable_secondary_cpu_mm() for
booting secondary cpus.
This is done in preparation for moving the code related to MMU in MMU specific
file and in order to support non MMU cpus in future.
On Thu, Oct 12, 2023 at 10:09:15PM +, Volodymyr Babchuk wrote:
> From: Oleksandr Andrushchenko
>
> Use a previously introduced per-domain read/write lock to check
> whether vpci is present, so we are sure there are no accesses to the
> contents of the vpci struct if not. This lock can be used
On 17/11/2023 9:47 am, Roger Pau Monne wrote:
> The current loop that iterates from 0 to the maximum RAM address in order to
> setup the IOMMU mappings is highly inefficient, and it will get worse as the
> amount of RAM increases. It's also not accounting for any reserved regions
> past the last R
On Thu, Oct 12, 2023 at 10:09:15PM +, Volodymyr Babchuk wrote:
> Add per-domain d->pci_lock that protects access to
> d->pdev_list. Purpose of this lock is to give guarantees to VPCI code
> that underlying pdev will not disappear under feet. This is a rw-lock,
> but this patch adds only write_l
Hi Stefano,
Stefano Stabellini writes:
> On Fri, 17 Nov 2023, Volodymyr Babchuk wrote:
>> > I still think, no matter the BDF allocation scheme, that we should try
>> > to avoid as much as possible to have two different PCI Root Complex
>> > emulators. Ideally we would have only one PCI Root Co
On Thu, Oct 12, 2023 at 10:09:14PM +, Volodymyr Babchuk wrote:
> Previously pci_enable_msi() function obtained pdev pointer by itself,
> but taking into account upcoming changes to PCI locking, it is better
> when caller passes already acquired pdev pointer to the function.
A bit more detail i
Hey Alejandro,
Thanks for your feedback.
I'll consider all your points, and any other comments from the community
before proceeding on the next steps.
If anyone else has any further ideas, please let me know *Friday 24th
November 2023.*
Many thanks,
Kelly Choi
Open Source Community Manager
XenS
On Fri, Nov 17, 2023 at 02:23:42PM +0100, Jan Beulich wrote:
> On 17.11.2023 13:40, Roger Pau Monné wrote:
> > On Wed, Sep 13, 2023 at 10:35:46AM -0400, Stewart Hildebrand wrote:
> >> --- a/xen/drivers/vpci/vpci.c
> >> +++ b/xen/drivers/vpci/vpci.c
> >> @@ -29,6 +29,9 @@ struct vpci_register {
> >>
On Wed, Sep 13, 2023 at 10:35:46AM -0400, Stewart Hildebrand wrote:
> +int vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler,
> + vpci_write_t *write_handler, unsigned int offset,
> + unsigned int size, void *data, uint32_t
> rs
On 17.11.2023 13:40, Roger Pau Monné wrote:
> On Wed, Sep 13, 2023 at 10:35:46AM -0400, Stewart Hildebrand wrote:
>> --- a/xen/drivers/vpci/vpci.c
>> +++ b/xen/drivers/vpci/vpci.c
>> @@ -29,6 +29,9 @@ struct vpci_register {
>> unsigned int offset;
>> void *private;
>> struct list_hea
hi Julien, Oleksandr,
[..]
This patch series only covers use-cases where the device emulator
handles the *entire* PCI Host bridge and PCI (virtio-pci) devices behind
it (i.e. Qemu). Also this patch series doesn't touch vPCI/PCI
pass-through resources, handling, accounting, nothing.
I unders
On Fri, Nov 17, 2023 at 12:03:19PM +, Andrew Cooper wrote:
> On 17/11/2023 9:47 am, Roger Pau Monne wrote:
> > No functional change intended.
> >
> > Signed-off-by: Roger Pau Monné
>
> There may only be one caller (after dropping some bogus tboot logic
> recently IIRC), but this isn't an IOMM
flight 183777 xen-4.18-testing real [real]
flight 183782 xen-4.18-testing real-retest [real]
http://logs.test-lab.xenproject.org/osstest/logs/183777/
http://logs.test-lab.xenproject.org/osstest/logs/183782/
Failures :-/ but no regressions.
Tests which are failing intermittently (not blocking):
t
On Wed, Sep 13, 2023 at 10:35:46AM -0400, Stewart Hildebrand wrote:
> Introduce a handler for the PCI status register, with ability to mask the
> capabilities bit. The status register contains RsvdZ bits, read-only bits, and
> write-1-to-clear bits, so introduce bitmasks to handle these in vPCI. If
The header is shared between archs so it is moved to asm-generic.
Signed-off-by: Oleksii Kurochko
---
Changes in V3:
- Use forward-declaration of struct domain instead of " #include
".
- Add ' include '
- Drop PPC's monitor.h.
---
Changes in V2:
- remove inclusion of "+#include "
ifdefing inclusion of in
allows to avoid generation of empty header
for the case when !CONFIG_MEM_ACCESS.
For Arm it was explicitly added inclusion of for p2m.c
and traps.c because they require some functions from which
aren't available in case of !CONFIG_MEM_ACCESS.
Suggested-by: Jan Beulic
is common between Arm, PPC and RISC-V so it is
moved to asm-generic.
Signed-off-by: Oleksii Kurochko
---
Changes in V3:
- Drop Arm and PPC's softirq.h
- Update the commit message.
---
Changes in V2:
- update the commit message.
---
xen/arch/arm/include/asm/Makefile
is common through archs thereby it is moved
to asm-generic.
Arm and PPC were switched to asm generic verstion of hardirq.h.
Signed-off-by: Oleksii Kurochko
---
Changes in V3:
- Drop Arm and PPC's hardirq.h
- Update the commit message.
---
Changes in V2:
- add #include .
- upda
The patch introduces generic percpu.h which was based on Arm's version
with the following changes:
* makes __per_cpu_data_end[] constant
* introduce get_per_cpu_offset() for macros this_cpu() and this_cpu_ptr()
* add inclustion of as get_per_cpu_offset() is located there.
Also it was changed a
The patch introduces generic paging.h header for Arm, PPC and
RISC-V.
All mentioned above architectures use hardware virt extensions
and hardware pagetable extensions thereby it makes sense to set
paging_mode_translate and paging_mode_external by default.
Also in this patch Arm and PPC architectu
iocap.h is common for Arm, PPC and RISC-V architectures thereby
it was moved to asm-generic.
Also Arm and PPC were switched to asm-generic version of iocap.h.
Signed-off-by: Oleksii Kurochko
---
Changes in V3:
- Drop Arm and PPC's iocap.h and switch to asm-generic's version.
- Update the com
Some headers are common between several architectures, so the current patch
series
provide them.
Another one reason to have them as generic is a simplification of adding support
necessary to make a complete Xen build as it was/is being done in the patch
series [1]
and [2].
Also, instead of prov
is common between archs so it is moved to
asm-generic.
Arm and PPC were switched to asm-generic version of altp2m.h.
Signed-off-by: Oleksii Kurochko
---
Changes in V3:
- Drop Arm and PPC's altp2m.h
- Update the commit message.
---
Changes in V2:
- change uint16_t to unsigned int in de
Ifdef-ing inclusion of allows to avoid
generation of empty for cases when
CONFIG_GRANT_TABLE is not enabled.
The following changes were done for Arm:
should be included directly because it contains
gnttab_dom0_frames() macros which is unique for Arm and is used in
arch/arm/domain_build.c.
is #
is common through some archs so it is moved
to asm-generic.
Signed-off-by: Oleksii Kurochko
---
Changes in V3:
- Remove old header inclusion in asm-generic numa.h and include
and
- Drop Arm and PPC's numa.h and use asm-generic version instead.
---
Changes in V2:
- update the commi
is common for Arm, PPC and RISC-V thereby it
is moved to asm-generic.
Signed-off-by: Oleksii Kurochko
---
Changes in V3:
- Drop Arm and PPC's random.h and switch to asm-generic verison.
---
Changes in V2:
- update the commit messages
---
xen/arch/arm/include/asm/Makefile | 1 +
xen/arch/arm/
All archs have the do_div implementation for BITS_PER_LONG == 64
so do_div64.h is moved to asm-generic.
x86 and PPC were switched to asm-generic version of div64.h.
Signed-off-by: Oleksii Kurochko
---
Changes in V3:
- Drop x86 and PPC's div64.h.
- Update the commit message.
---
Changes in V2:
Introduce an empty generic hypercall.h for archs which don't
implement it.
Drop PPC's hypercall.h and switch to generic one instead.
Signed-off-by: Oleksii Kurochko
Acked-by: Jan Beulich
---
Changes in V3:
- Drop PPC's hypercall.h and switch to generic one.
- Update the commit message
- Add
Arm, PPC and RISC-V use the same device.h thereby device.h
was moved to asm-generic. Arm's device.h was taken as a base with
the following changes:
- #ifdef PCI related things.
- #ifdef ACPI related things.
- Rename #ifdef guards.
- Add SPDX tag.
- #ifdef CONFIG_HAS_DEVICE_TREE related things.
On Fri, Nov 17, 2023 at 10:47:49AM +0100, Roger Pau Monne wrote:
> The current loop that iterates from 0 to the maximum RAM address in order to
> setup the IOMMU mappings is highly inefficient, and it will get worse as the
> amount of RAM increases. It's also not accounting for any reserved region
On 17/11/2023 9:47 am, Roger Pau Monne wrote:
> No functional change intended.
>
> Signed-off-by: Roger Pau Monné
There may only be one caller (after dropping some bogus tboot logic
recently IIRC), but this isn't an IOMMU-specific helper.
See the comment in the middle which shows the other openc
On 17/11/2023 9:47 am, Roger Pau Monne wrote:
> Using different page table levels for HVM or PV guest is not helpful, and is
> not inline with the IOMMU implementation used by the other architecture vendor
> (VT-d).
>
> Switch to uniformly use DEFAULT_DOMAIN_ADDRESS_WIDTH in order to set the
> AMD
On Wed, Sep 13, 2023 at 10:35:47AM -0400, Stewart Hildebrand wrote:
> Currently, Xen vPCI only supports virtualizing the MSI and MSI-X capabilities.
> Hide all other PCI capabilities (including extended capabilities) from domUs
> for
> now, even though there may be certain devices/drivers that dep
On 17.11.2023 11:17, Nicola Vetrini wrote:
> Hi all,
>
> As discussed in this thread [1], which is about complying with MISRA C
> Rule 10.1,
> a macro was introduced to encapsulate a well-known construct:
>
> /*
> * Given an unsigned integer argument, expands to a mask where just the
> least
On 17.11.2023 12:15, Nicola Vetrini wrote:
> On 2023-11-17 12:04, Andrew Cooper wrote:
>> On 17/11/2023 10:17 am, Nicola Vetrini wrote:
>>> Hi all,
>>>
>>> As discussed in this thread [1], which is about complying with MISRA C
>>> Rule 10.1,
>>> a macro was introduced to encapsulate a well-known co
On 2023-11-17 12:04, Andrew Cooper wrote:
On 17/11/2023 10:17 am, Nicola Vetrini wrote:
Hi all,
As discussed in this thread [1], which is about complying with MISRA C
Rule 10.1,
a macro was introduced to encapsulate a well-known construct:
/*
* Given an unsigned integer argument, expands to a
On Wed, Nov 15, 2023 at 03:04:59PM +, Anthony PERARD wrote:
> On Wed, Nov 15, 2023 at 11:11:30AM +0100, Jan Beulich wrote:
> > On 14.11.2023 21:26, GitLab wrote:
> > > Pipeline #1072370735 (
> > > https://gitlab.com/xen-project/xen/-/pipelines/1072370735 ) triggered by
> > > Ganis ( https://g
On 17/11/2023 10:17 am, Nicola Vetrini wrote:
> Hi all,
>
> As discussed in this thread [1], which is about complying with MISRA C
> Rule 10.1,
> a macro was introduced to encapsulate a well-known construct:
>
> /*
> * Given an unsigned integer argument, expands to a mask where just
> the least
>
On 20/10/23 08:35, Jan Beulich wrote:
On 19.10.2023 18:26, Stefano Stabellini wrote:
On Thu, 19 Oct 2023, Jan Beulich wrote:
On 19.10.2023 00:43, Stefano Stabellini wrote:
On Mon, 16 Oct 2023, Jan Beulich wrote:
On 03.10.2023 17:24, Federico Serafini wrote:
--- a/xen/arch/x86/mm.c
+++ b/xen/
On 17/11/23 11:12, Julien Grall wrote:
Hi Federico,
On 17/11/2023 08:28, Federico Serafini wrote:
Introduce function type bug_fn_t. This improves readability and helps
to validate that the function passed to run_in_exception_handle() has
the expected prototype.
Hmmm... I read the second part as
Hi all,
As discussed in this thread [1], which is about complying with MISRA C
Rule 10.1,
a macro was introduced to encapsulate a well-known construct:
/*
* Given an unsigned integer argument, expands to a mask where just the
least
* significant nonzero bit of the argument is set, or 0 if n
On Fri, Nov 17, 2023 at 09:18:39AM +, James Dingwall wrote:
> On Thu, Nov 16, 2023 at 04:32:47PM +, Andrew Cooper wrote:
> > On 16/11/2023 4:15 pm, James Dingwall wrote:
> > > Hi,
> > >
> > > Per the msr_relaxed documentation:
> > >
> > >"If using this option is necessary to fix an issu
On Thu, Nov 16, 2023 at 05:14:23PM -0800, Stefano Stabellini wrote:
> On Thu, 16 Nov 2023, Roger Pau Monne wrote:
> > Instead of using specific architecture image, switch to using multi-arch
> > ones
> > and specify the desired architecture using the --platform option.
> >
> > Signed-off-by: Roge
On 2023-11-07 11:11, Elliott Mitchell wrote:
> On Mon, Oct 30, 2023 at 04:27:22PM +01��
00, Roger Pau Monné wrote:
> > On Mon, Oct 30, 2023 at 07:50:27AM -0700, Elliott Mitchell wrote:
> > > On Tue, Oct 24, 2023 at 03:51:50PM +0200, Roger Pau Monne wrote:
> > > > diff --git a/xen/arch/x86/genapic/x
Hi Federico,
On 17/11/2023 08:28, Federico Serafini wrote:
Introduce function type bug_fn_t. This improves readability and helps
to validate that the function passed to run_in_exception_handle() has
the expected prototype.
Hmmm... I read the second part as you will validate the type in
run_in_e
On Thu, Nov 16, 2023 at 05:05:28PM -0800, Stefano Stabellini wrote:
> On Thu, 16 Nov 2023, Roger Pau Monne wrote:
> > The gitlab CI webpage seems to have issues displaying the \CR\CR\LF "\r\r\n"
> > sequence on the web interface used as line returns by the Linux kernel
> > serial
> > output. This
Hi Volodymyr,
On 16/11/2023 20:56, Volodymyr Babchuk wrote:
It is very helpful to see domain id why analyzing xenstored
traces. Especially when you are trying to understand which exactly
domain performs an action.
Signed-off-by: Volodymyr Babchuk
---
tools/xenstored/core.c | 4 ++--
1 file
I will drop this patch as it will be hard to make it generic for Arm,
PPC and RISC-V.
~ Oleksii
On Fri, 2023-11-10 at 18:30 +0200, Oleksii Kurochko wrote:
> is expcted to be generic between Arm, PPC and RISC-V
> there by it is moved to asm-generic.
>
> Right now it is common only by PPC and RIS
On 17.11.2023 10:18, James Dingwall wrote:
> On Thu, Nov 16, 2023 at 04:32:47PM +, Andrew Cooper wrote:
>> On 16/11/2023 4:15 pm, James Dingwall wrote:
>>> Hi,
>>>
>>> Per the msr_relaxed documentation:
>>>
>>>"If using this option is necessary to fix an issue, please report a bug."
>>>
>>>
Hi Jan,
While I've committed this patch (hoping that I got the necessary
context
adjustment right for the
automation/eclair_analysis/ECLAIR/deviations.ecl
change), I'd like to come back to this before going further with
users
of
the new macro: I still think we ought to try to get to the single
No functional change intended.
Signed-off-by: Roger Pau Monné
---
xen/arch/x86/include/asm/setup.h| 2 --
xen/arch/x86/setup.c| 49
xen/drivers/passthrough/x86/iommu.c | 50 +
3 files changed, 50 insertions(+), 51 dele
Hello,
The follow series aims to improve the time consumed to setup the IOMMU
for the hardware domain.
Patch 1 and 2 are prereqs, while patch 3 is the actual change that
speeds up IOMMU setup. See patch description for figures.
Thanks, Roger.
Roger Pau Monne (3):
amd-vi: use the same IOMMU p
The current loop that iterates from 0 to the maximum RAM address in order to
setup the IOMMU mappings is highly inefficient, and it will get worse as the
amount of RAM increases. It's also not accounting for any reserved regions
past the last RAM address.
Instead of iterating over memory addresse
Using different page table levels for HVM or PV guest is not helpful, and is
not inline with the IOMMU implementation used by the other architecture vendor
(VT-d).
Switch to uniformly use DEFAULT_DOMAIN_ADDRESS_WIDTH in order to set the AMD-Vi
page table levels.
Note using the max RAM address for
On 27/10/23 00:55, Stefano Stabellini wrote:
+Roger
See below
On Thu, 26 Oct 2023, Julien Grall wrote:
On 26/10/2023 15:04, Federico Serafini wrote:
On 26/10/23 15:54, Julien Grall wrote:
Hi,
On 26/10/2023 13:13, Federico Serafini wrote:
On 26/10/23 12:25, Julien Grall wrote:
Hi,
On 26/1
Static analysis tools may detect a possible null pointer
dereference of 'config'. This ASSERT helps them in detecting
that such a condition is not possible given that only
real domains can enter this branch, which are guaranteeed to have
a non-NULL config at this point, but this information is not
On Thu, Nov 16, 2023 at 04:32:47PM +, Andrew Cooper wrote:
> On 16/11/2023 4:15 pm, James Dingwall wrote:
> > Hi,
> >
> > Per the msr_relaxed documentation:
> >
> >"If using this option is necessary to fix an issue, please report a bug."
> >
> > After recently upgrading an environment from
On Thu, 2023-11-16 at 13:28 +0100, Jan Beulich wrote:
> On 16.11.2023 13:04, Oleksii wrote:
> > On Thu, 2023-11-16 at 08:36 +0100, Jan Beulich wrote:
> > > On 10.11.2023 17:30, Oleksii Kurochko wrote:
> > > > --- /dev/null
> > > > +++ b/xen/include/asm-generic/percpu.h
> > > > @@ -0,0 +1,35 @@
> >
To be able to check for the existence of the necessary subsections in
the documentation for MISRA C:2012 Dir 4.1, ECLAIR needs to have a source
file that is built.
This file is generated from 'C-runtime-failures.rst' in docs/misra
and the configuration is updated accordingly.
Signed-off-by: Nicol
This series addresses some concerns raised on patches 2 and 3 from [1].
Note that patch 1 from that series has already been applied.
Patch 1 comprises a modified version of patches 2 and 3 of the previous series.
Patch 2 is brand new, as it merely clarifies how to write such documentation.
[1]
h
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