This is similar to what is being done on x86.
Signed-off-by: Ayan Kumar Halder
---
xen/arch/arm/setup.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c
index 424744ad5e..3d110685bc 100644
--- a/xen/arch/arm/setup.c
+++ b/xen/arch/arm/setup.c
On 09/03/2024 06:44, Henry Wang wrote:
Hi Julien,
Hi Julien/Henry,
On 3/9/2024 6:30 AM, Julien Grall wrote:
(+ Ayan + Henry)
(- my old email address + the new one)
Hi Carlo,
On 29/01/2024 17:18, Carlo Nonato wrote:
Cache coloring must physically relocate Xen in order to color the
to ensure that DBGOSLSR.OSLK is 0, which
allows us to skip the emulation of DBGDSCREXT (TXfull is treated as UNK/SBZP)
and focus on DBGDSCRINT. DBGOSLSR.OSLM[1] is set to 1 to mantain consistency
with Arm64.
Take the opportunity to fix the minimum EL for DBGDSCRINT, which should be 0.
Signed-off-by:
e so that Xen supports partial emulation. However, customers are
fully aware when they enable partial emulation. It's important to note that
enabling such support might result in unwanted/non-spec compliant behavior.
Added a note in SUPPORT.md to clarify the security support for partial
emulation.
Sign
l
Signed-off-by: Ayan Kumar Halder
---
Changes from
v1 :- 1. DBGDTR_EL0 does not emulate RXfull. This is to avoid giving the OS any
indication that the RX buffer is full and is waiting to be read.
2. In Arm32, DBGOSLSR is emulated. Also DBGDTRTXINT is emulated at EL0 only.
3. Fixed the commit messa
patches.
Ayan Kumar Halder (2):
xen/arm: Introduce CONFIG_PARTIAL_EMULATION and "partial-emulation"
cmd option
xen/arm: arm32: Add emulation of Debug Data Transfer Registers
Michal Orzel (1):
xen/arm: arm64: Add emulation of Debug Data Transfer Registers
On 01/03/2024 17:21, Oleksii wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
Hello everyone,
Hi Oleksii,
Greetings
I would like to share with you a list
On 26/02/2024 08:39, Michal Orzel wrote:
Hi Ayan,
Hi,
On 23/02/2024 16:41, Ayan Kumar Halder wrote:
Hi,
On 20/02/2024 12:17, Ayan Kumar Halder wrote:
From: Michal Orzel
Currently, if user enables HVC_DCC config option in Linux, it invokes access
to debug data transfer registers (i.e
Hi,
On 20/02/2024 12:17, Ayan Kumar Halder wrote:
From: Michal Orzel
Currently, if user enables HVC_DCC config option in Linux, it invokes access
to debug data transfer registers (i.e. DBGDTRTX_EL0 on arm64, DBGDTRTXINT on
arm32). As these registers are not emulated, Xen injects an undefined
Hi Jan,
On 21/02/2024 07:09, Jan Beulich wrote:
On 20.02.2024 16:22, Ayan Kumar Halder wrote:
On 20/02/2024 12:33, Jan Beulich wrote:
On 20.02.2024 13:17, Ayan Kumar Halder wrote:
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -101,6 +101,18 @@ Extension to the GICv3 interrupt controller to support
Hi Jan,
On 20/02/2024 12:33, Jan Beulich wrote:
On 20.02.2024 13:17, Ayan Kumar Halder wrote:
There can be situations when the registers cannot be emulated to their full
functionality. This can be due to the complexity involved. In such cases, one
can emulate those registers as RAZ/WI
l
Signed-off-by: Ayan Kumar Halder
Reviewed-by: Michal Orzel
---
Changes from
v1 :- 1. DBGDTR_EL0 does not emulate RXfull. This is to avoid giving the OS any
indication that the RX buffer is full and is waiting to be read.
2. In Arm32, DBGOSLSR is emulated. Also DBGDTRTXINT is emulated at EL0 on
BGDTRTXINT.
Signed-off-by: Ayan Kumar Halder
Reviewed-by: Michal Orzel
---
Changes from
v1 :- 1. DBGDTR_EL0 does not emulate RXfull. This is to avoid giving the OS any
indication that the RX buffer is full and is waiting to be read.
2. In Arm32, DBGOSLSR is emulated. Also DBGDTRTXINT is emula
=0ec058ece2f933aed66b76bd5cb9b5e6764853c3
Changes from v1:-
1. Split the change across 3 patches as per the design consensus.
v2 :-
1. Reordered the patches.
v3 :-
1. Change mentioned in individual patches.
v4 :-
1. Change mentioned in individual patches.
Ayan Kumar Halder (2):
xen/arm
ts partial emulation. However, customers are
fully aware when they enable partial emulation. It's important to note that
enabling such support might result in unwanted/non-spec compliant behavior.
Added a note in SUPPORT.md to clarify the security support for partial
emulation.
Signed-off-by: Ayan K
On 06/02/2024 19:05, Julien Grall wrote:
Hi Ayan,
Hi Julien/Michal,
On 31/01/2024 12:10, Ayan Kumar Halder wrote:
From: Michal Orzel
Currently, if user enables HVC_DCC config option in Linux, it invokes
access
to debug data transfer registers (i.e. DBGDTRTX_EL0 on arm64,
DBGDTRTXINT
l
Signed-off-by: Ayan Kumar Halder
---
Changes from
v1 :- 1. DBGDTR_EL0 does not emulate RXfull. This is to avoid giving the OS any
indication that the RX buffer is full and is waiting to be read.
2. In Arm32, DBGOSLSR is emulated. Also DBGDTRTXINT is emulated at EL0 only.
3. Fixed the commit messa
, DBGDTRTXint
"If TXfull is set to 1, set DTRTX to UNKNOWN".
So, DBGDTR[TR]XINT is emulated as RAZ/WI.
Thus, any OS is expected to read DBGDSCRINT and check for TXfull before using
DBGDTRTXINT.
Signed-off-by: Ayan Kumar Halder
---
Changes from
v1 :- 1. DBGDTR_EL0 does not emul
ts partial emulation. However, customers are
fully aware when they enable partial emulation. It's important to note that
enabling such support might result in unwanted/non-spec compliant behavior.
Signed-off-by: Ayan Kumar Halder
---
Changes from v1 :-
1. New patch introduced in v2.
v2 :-
1.
=0ec058ece2f933aed66b76bd5cb9b5e6764853c3
Changes from v1:-
1. Split the change across 3 patches as per the design consensus.
v2 :-
1. Reordered the patches.
v3 :-
1. Change mentioned in individual patches.
Ayan Kumar Halder (2):
xen/arm: Introduce CONFIG_PARTIAL_EMULATION and "partial-emul
fore
using DBGDTRTX_EL0. Linux does it via hvc_dcc_init() ---> hvc_dcc_check(),
it returns -ENODEV. In this way, we are preventing the VM from accessing
DBGDTRTX_EL0 register.
We also emulate DBGDTR[TR]X_EL0 as RAZ/WI.
Signed-off-by: Michal Orzel
Signed-off-by: Ayan Kumar Halder
---
Changes
as RAZ (as
DBGOSLSR.OSLK == 0). DBGDSCRINT.TXfull is set to 1.
Refer ARM DDI 0487J.a ID042523, G8.3.19, DBGDTRTXint
"If TXfull is set to 1, set DTRTX to UNKNOWN".
So, DBGDTR[TR]XINT is emulated as RAZ/WI.
Signed-off-by: Ayan Kumar Halder
---
Changes from
v1 :- 1. DBGDTR_EL0 does not emul
=0ec058ece2f933aed66b76bd5cb9b5e6764853c3
Changes from v1:-
1. Split the change across 3 patches as per the design consensus.
v2 :-
1. Reordered the patches.
Ayan Kumar Halder (2):
xen/arm: Introduce CONFIG_PARTIAL_EMULATION and "partial-emulation"
cmd option
xen/arm: arm32: Add
emulation. However, customers are
fully aware when they enable partial emulation.
Signed-off-by: Ayan Kumar Halder
---
Changes from v1 :-
1. New patch introduced in v2.
v2 :-
1. Reordered the patches so that the config and command line option is
introduced in the first patch.
docs/misc/xen-comma
On 20/12/2023 13:16, Julien Grall wrote:
Hi,
Hi Julien/Luca,
On 20/12/2023 12:15, Ayan Kumar Halder wrote:
On 20/12/2023 09:43, Luca Fancellu wrote:
On 20 Dec 2023, at 09:29, Luca Fancellu wrote:
Hi Ayan,
Hi Luca,
Thanks for looking into this.
On 18 Dec 2023, at 20:29, Ayan
On 20/12/2023 09:43, Luca Fancellu wrote:
On 20 Dec 2023, at 09:29, Luca Fancellu wrote:
Hi Ayan,
Hi Luca,
Thanks for looking into this.
On 18 Dec 2023, at 20:29, Ayan Kumar Halder wrote:
Hi,
Refer
https://lore.kernel.org/all/alpine.DEB.2.22.394.2312071341540.1265976@ubuntu
t the need to
rebuild Xen.
Signed-off-by: Ayan Kumar Halder
---
Changes from v1:-
1. New patch introduced in v2.
docs/misc/xen-command-line.pandoc | 7 +++
xen/arch/arm/arm64/vsysreg.c | 5 -
xen/arch/arm/include/asm/regs.h | 6 ++
xen/arch/arm/traps.c | 3 +++
o that Xen does not need to be
rebuilt in order to prevent guest from crashing while accessing registers like
DBGDTRTX_EL0.
Signed-off-by: Ayan Kumar Halder
---
Changes from v1:-
1. New patch introduced in v2.
xen/arch/arm/Kconfig | 8
xen/arch/arm/arm64/vsysreg.c | 3 +++
xe
=0ec058ece2f933aed66b76bd5cb9b5e6764853c3
Changes from v1:-
1. Split the change across 3 patches as per the design consensus.
Ayan Kumar Halder (3):
xen/arm: Add emulation of Debug Data Transfer Registers
xen: arm: Introduce CONFIG_PARTIAL_EMULATION
xen/arm: Introduce "partial-emulation
On 11/12/2023 09:33, Julien Grall wrote:
Hi,
Hi Julien/Stefano/Bertrand/Michal,
It is a great discussion, thanks for your suggestions.
I think we have an agreement. :-)
On 07/12/2023 21:41, Stefano Stabellini wrote:
On Thu, 7 Dec 2023, Julien Grall wrote:
Hi Stefano,
On 05/12/2023
/2023 13:02, Ayan Kumar Halder wrote:
On 04/12/2023 10:31, Julien Grall wrote:
Hi Ayan,
Hi Julien,
On 01/12/2023 18:50, Ayan Kumar Halder wrote:
Currently if user enables HVC_DCC config option in Linux, it invokes
access to debug data transfer registers (ie DBGDTRTX_EL0 on arm64,
DBGDTRTXINT
On 04/12/2023 10:31, Julien Grall wrote:
Hi Ayan,
Hi Julien,
On 01/12/2023 18:50, Ayan Kumar Halder wrote:
Currently if user enables HVC_DCC config option in Linux, it invokes
access to debug data transfer registers (ie DBGDTRTX_EL0 on arm64,
DBGDTRTXINT on arm32). As these registers
ded emulation for AArch32 variant of these registers as well.
Also, we have added handle_read_val_wi() to emulate DBGDSCREXT register
to return a specific value (ie TXfull | RXfull) and ignore any writes
to this register.
Signed-off-by: Michal Orzel
Signed-off-by: Ayan Kumar Halder
---
xen/arch
Hi Amit/All,
We came across this scenario and would be helpful if you can provide
some pointers
Linux running as Dom0 on Xen hypervisor with HVC_DCC = y and HVC_XEN = y
on Arm64 platform.
This causes a crash when Dom0 tries to access "DBGDTRTX_EL0" register,
it traps to Xen.
Xen does
os.h.
This is based on 6734327d76be ("xen/arm64: Split and move MMU-specific head.S
to mmu/head.S").
Signed-off-by: Ayan Kumar Halder
Reviewed-by: Michal Orzel
---
Changes from v1 :-
1. Added a commit message
2. Moved load_paddr to mmu/head.S
v2 :-
1. Renamed puts to asm_puts and putn
can
be bundled with other MMU functionality"
and "[XEN v1 4/4] xen/arm: traps.c: Enclose VMSA specific registers within
CONFIG_MMU".
v2 - Changes mentioned in individual patches.
v3 - Changes mentioned in individual patches.
v4 - Changes mentioned in individual patches.
Ayan Kumar
.
This is based on d2f8df5b3ede ("xen/arm64: head.S: Introduce
enable_{boot,secondary}_cpu_mm()").
Signed-off-by: Ayan Kumar Halder
Reviewed-by: Michal Orzel
Acked-by: Julien Grall
---
Changes from :-
v1 - 1. Added a proper commit message.
2. Some style and other fixes suggested i
fic head.S
to mmu/head.S").
Signed-off-by: Ayan Kumar Halder
---
Changes from v1 :-
1. Added a commit message
2. Moved load_paddr to mmu/head.S
v2 :-
1. Renamed puts to asm_puts and putn to asm_putn. Exported asm_putn().
2. Moved XEN_TEMPORARY_OFFSET to head.S.
3. Some style issues.
v3 :-
can
be bundled with other MMU functionality"
and "[XEN v1 4/4] xen/arm: traps.c: Enclose VMSA specific registers within
CONFIG_MMU".
v2 - Changes mentioned in individual patches.
v3 - Changes mentioned in individual patches.
Ayan Kumar Halder (2):
xen/arm32: head: Introduce enable_{
.
This is based on d2f8df5b3ede ("xen/arm64: head.S: Introduce
enable_{boot,secondary}_cpu_mm()").
Signed-off-by: Ayan Kumar Halder
Reviewed-by: Michal Orzel
Acked-by: Julien Grall
---
Changes from :-
v1 - 1. Added a proper commit message.
2. Some style and other fixes suggested i
fic head.S
to mmu/head.S").
Signed-off-by: Ayan Kumar Halder
---
Changes from v1 :-
1. Added a commit message
2. Moved load_paddr to mmu/head.S
v2 :-
1. Renamed puts to asm_puts and putn to asm_putn. Exported asm_putn().
2. Moved XEN_TEMPORARY_OFFSET to head.S.
3. Some style issue
.
This is based on d2f8df5b3ede ("xen/arm64: head.S: Introduce
enable_{boot,secondary}_cpu_mm()").
Signed-off-by: Ayan Kumar Halder
Reviewed-by: Michal Orzel
Acked-by: Julien Grall
---
Changes from :-
v1 - 1. Added a proper commit message.
2. Some style and other fixes suggested i
hin
CONFIG_MMU".
v2 - Changes mentioned in individual patches.
Ayan Kumar Halder (2):
xen/arm32: head: Introduce enable_{boot,secondary}_cpu_mm()
xen/arm32: head Split and move MMU-specific head.S to mmu/head.S
xen/arch/arm/arm32/head.S | 578 +---
x
el.org/all/20231101233011.83098-3-jul...@xen.org/T/
Changes from :-
v1 - Dropped "[XEN v1 1/4] xen/arm: arm32: Move pt_enforce_wxn() so that it can
be bundled with other MMU functionality"
and "[XEN v1 4/4] xen/arm: traps.c: Enclose VMSA specific registers within
CONFIG_MMU".
Ayan
the region between
_idmap_start and _idmap_end. And in Xen linker script, we force the
.text.idmap contents to linked after .text.header. This will ensure
code of head.S always be at the top of Xen binary.
This is based on commit 6734327d76be.
Signed-off-by: Ayan Kumar Halder
---
Changes from v1 :-
.
This is based on d2f8df5b3ede commit.
Signed-off-by: Ayan Kumar Halder
---
Changes from :-
v1 - 1. Added a proper commit message.
2. Some style and other fixes suggested in v1.
xen/arch/arm/arm32/head.S | 89 +--
1 file changed, 67 insertions(+), 22
() "r10" is no longer used. The reason being
__lookup_processor_type uses adr_l (thus r10 is no longer used to obtain the
physical address offset). Consequently, there is no need to save/restore r10.
Signed-off-by: Ayan Kumar Halder
Reviewed-by: Michal Orzel
---
Refer https://lists.archiv
Hi Xen Maintainers/developers,
As part of my talk, I wish to provide some examples of tasks that a
newbie can easily pick up and contribute.
This need not be a dedicated project, but something that can be
contributed on an ad-hoc basis.
The idea is to get more people interested in Xen
() "r10" is no longer used. The reason being
__lookup_processor_type uses adr_l (thus r10 is no longer used to obtain the
physical address offset). Consequently, there is no need to save/restore r10.
Signed-off-by: Ayan Kumar Halder
---
Refer https://lists.archive.carbon60.com/xen/de
On 26/10/2023 10:40, Julien Grall wrote:
Hi,
Hi Julien/Michal,
On 25/10/2023 18:03, Ayan Kumar Halder wrote:
Before the MMU is turned on, the address returned for any symbol will
always be
physical address. Thus, one can use adr_l instead of load_paddr.
create_table_entry() now takes
() "r10" is no longer used. The reason being
__lookup_processor_type uses adr_l (thus r10 is no longer used to obtain the
physical address offset).
Signed-off-by: Ayan Kumar Halder
---
Refer https://lists.archive.carbon60.com/xen/devel/682900 for details.
Changes from :-
v1 :- 1. No need
load_paddr to get the physical address of the page table symbol.
Signed-off-by: Ayan Kumar Halder
---
Refer https://lists.archive.carbon60.com/xen/devel/682900 for details.
xen/arch/arm/arm32/head.S | 35 ---
1 file changed, 20 insertions(+), 15 deletions
Hi Alex,
On 20/10/2023 16:15, Alex Bennée wrote:
Ayan Kumar Halder writes:
Hi Peter/Alex,
Appreciate your help. :)
On 31/08/2023 11:03, Peter Maydell wrote:
CAUTION: This message has originated from an External Source. Please
use proper judgment and caution when opening attachments
On 16/10/2023 19:45, Julien Grall wrote:
Hi,
Hi Julien,
On 11/09/2023 14:59, Ayan Kumar Halder wrote:
This is based on
"[PATCH v6 03/13] xen/arm64: Split and move MMU-specific head.S to
mmu/head.S"
https://www.mail-archive.com/xen-devel@lists.xenproject.org/msg151920.htm
On 28/09/2023 09:34, Luca Fancellu wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
Hi all,
Hi Luca,
In the last MISRA meeting Stefano told me about the Rule
Change VPCU to vCPU.
Also add a space before '*/'.
Signed-off-by: Ayan Kumar Halder
Acked-by: Julien Grall
---
Changes from -
v1 - 1. Change VCPU --> vCPU.
2. Add a space before '*/'.
xen/arch/arm/include/asm/procinfo.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
On 28/09/2023 12:57, Julien Grall wrote:
Hi Ayan,
Hi Julien,
On 28/09/2023 12:48, Ayan Kumar Halder wrote:
Change VPCU to VCPU.
Signed-off-by: Ayan Kumar Halder
---
xen/arch/arm/include/asm/procinfo.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm
Change VPCU to VCPU.
Signed-off-by: Ayan Kumar Halder
---
xen/arch/arm/include/asm/procinfo.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/xen/arch/arm/include/asm/procinfo.h
b/xen/arch/arm/include/asm/procinfo.h
index 02be56e348..8b8dae3dd4 100644
--- a/xen/arch/arm
cific head.S to
mmu/head.S")
Reported-by: Julien Grall
Signed-off-by: Henry Wang
Reviewed-by: Ayan Kumar Halder
---
xen/arch/arm/arm64/mmu/head.S | 11 +++
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/xen/arch/arm/arm64/mmu/head.S b/xen/arch/arm/arm64/mmu/he
On 14/09/2023 06:48, Penny Zheng wrote:
Hi, Ayan
Hi Penny,
On 2023/9/11 21:59, Ayan Kumar Halder wrote:
The VMSA specific registers (ie TCR, TTBR0, TTBR1, VTTBR, etc) are
valid when
MMU is used, thus we can enclose them with CONFIG_MMU.
Signed-off-by: Ayan Kumar Halder
---
xen/arch
Hi Julien,
On 11/09/2023 15:51, Julien Grall wrote:
On 31/08/2023 10:16, Henry Wang wrote:
On Aug 31, 2023, at 17:12, Ayan Kumar Halder wrote:
Hi Henry,
On 28/08/2023 02:32, Henry Wang wrote:
diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 33b038e7e0..39218cf15f
Hi Henry,
On 08/09/2023 23:15, Stefano Stabellini wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
I committed patches 1-5
On Mon, 28 Aug 2023, Henry Wang
The VMSA specific registers (ie TCR, TTBR0, TTBR1, VTTBR, etc) are valid when
MMU is used, thus we can enclose them with CONFIG_MMU.
Signed-off-by: Ayan Kumar Halder
---
xen/arch/arm/traps.c | 17 +++--
1 file changed, 15 insertions(+), 2 deletions(-)
diff --git a/xen/arch/arm
This is based on
"[PATCH v6 03/13] xen/arm64: Split and move MMU-specific head.S to mmu/head.S"
https://www.mail-archive.com/xen-devel@lists.xenproject.org/msg151920.html
Signed-off-by: Ayan Kumar Halder
---
xen/arch/arm/arm32/head.S | 603 +---
xe
This is based on:-
"[PATCH v6 01/13] xen/arm64: head.S: Introduce enable_{boot,secondary}_cpu_mm()"
https://www.mail-archive.com/xen-devel@lists.xenproject.org/msg151918.html
This is being done for Arm32 as MPU support will be added for Arm32 as well.
Signed-off-by: Ayan Kumar Halder
pt_enforce_wxn() is moved up (as the previous instruction ie mov_w has
no effect on this). This way it is grouped with other MMU related
functions so that they can be moved together in the subsequent patch.
Signed-off-by: Ayan Kumar Halder
---
This is based on my comment on
"[PATCH v6 08/13
Hi,
These are the set of patches based on top of
"[PATCH v6 00/13] xen/arm: Split MMU code as the prepration of MPU work".
These patches aim to do similar MMU rework for Arm32.
Similar to the former series, this is the preparation work to add MPU
support for Arm32.
Ayan Kumar Halder
Hi Julien,
On 11/09/2023 09:09, Julien Grall wrote:
On Mon, 11 Sep 2023 at 09:02, Ayan Kumar Halder wrote:
Hi Henry,
On 11/09/2023 02:08, Henry Wang wrote:
> CAUTION: This message has originated from an External Source.
Please
> use proper judgment and cautio
Hi Henry,
On 11/09/2023 02:08, Henry Wang wrote:
CAUTION: This message has originated from an External Source. Please
use proper judgment and caution when opening attachments, clicking
links, or responding to this email.
Hi everyone,
This is the reminder that we are currently in the feature
On 07/09/2023 11:58, Penny Zheng wrote:
Hi Ayan
Hi Penny,
On 2023/9/7 17:44, Ayan Kumar Halder wrote:
Hi Henry,
On 28/08/2023 02:32, Henry Wang wrote:
CAUTION: This message has originated from an External Source. Please
use proper judgment and caution when opening attachments, clicking
Hi Henry,
On 28/08/2023 02:32, Henry Wang wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
Currently, most of the code is in arm/mm.{c,h} and arm/arm64/mm.c
is
Hi Henry,
On 28/08/2023 02:32, Henry Wang wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
From: Wei Chen
At the moment, on MMU system, enable_mmu() will
Hi Peter/Alex,
Appreciate your help. :)
On 31/08/2023 11:03, Peter Maydell wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
On Thu, 31 Aug 2023 at 10:53, Alex
Hi Henry,
On 28/08/2023 02:32, Henry Wang wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
Currently mmu_init_secondary_cpu() only enforces the page table
should
section.
3. Rename puts() to asm_puts() for global export
Signed-off-by: Wei Chen
Signed-off-by: Penny Zheng
Signed-off-by: Henry Wang
Reviewed-by: Ayan Kumar Halder
---
v4:
- Rebase to pick the adr -> adr_l change in PRINT(_s).
- Correct in-code comment for asm_puts() and add a n
Hi Henry,
On 01/08/2023 04:44, Henry Wang wrote:
CAUTION: This message has originated from an External Source. Please use proper
judgment and caution when opening attachments, clicking links, or responding to
this email.
There are two types of memory system architectures available for
Hi Julien/Henry,
Thanks for the explanation.
On 07/08/2023 12:47, Julien Grall wrote:
On 07/08/2023 12:43, Ayan Kumar Halder wrote:
On 07/08/2023 12:35, Henry Wang wrote:
Hi Ayan,
-Original Message-
Hi Henry,
At the moment, on MMU system, enable_mmu() will return to an
address
-by: Ayan Kumar Halder
Tested-by: Ayan Kumar Halder
Thanks, and...
+/*
+ * Enable mm (turn on the data cache and the MMU) for secondary CPUs.
+ * The function will return to the virtual address provided in LR (e.g. the
+ * runtime mapping).
+ *
+ * Inputs:
+ * lr : Virtual address to return
and
enable_secondary_cpu_mm() for secondary CPUs in this patch.
Signed-off-by: Wei Chen
Signed-off-by: Penny Zheng
Signed-off-by: Henry Wang
With two comments
Reviewed-by: Ayan Kumar Halder
Tested-by: Ayan Kumar Halder
---
v4:
- Clarify remove_identity_mapping() is called on boot CPU and keep
the function
+ xen-devel (Since the question is related to Xen on Arm in general).
Hi Michal,
Julien/Stefano/Bertrand - Please feel free to add in.
On 14/07/2023 15:14, Michal Simek wrote:
+xen
On 7/14/23 16:11, Michal Simek wrote:
Hi Stefano,
I am playing with running u-boot on the top of xen
Hi Jan,
On 10/07/2023 11:08, Jan Beulich wrote:
On 07.07.2023 13:35, Ayan Kumar Halder wrote:
--- a/xen/drivers/char/ns16550.c
+++ b/xen/drivers/char/ns16550.c
@@ -1342,13 +1342,9 @@ pci_uart_config(struct ns16550 *uart, bool_t skip_amt,
unsigned int idx
Hi Jan,
On 30/03/2023 07:55, Jan Beulich wrote:
On 29.03.2023 16:35, Ayan Kumar Halder wrote:
Please let me know if the below patch looks fine.
Apart from the comments below there may be formatting issues, which
I can't sensibly comment on when the patch was mangled by your mailer
anyway
as returned 0 (for success) or
not.
Signed-off-by: Ayan Kumar Halder
---
This was based on a discussion "[XEN v4 04/11] xen/drivers: ns16550: Use
paddr_t for io_base/io_size"
https://patchew.org/Xen/20230321140357.24094-1-ayan.kumar.hal...@amd.com/20230321140357.24094-5-ayan.kumar.hal...@amd.
On 26/06/2023 04:34, Penny Zheng wrote:
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Introduce a Kconfig option CONFIG_HAS_MPU to enable MPU architecture
support.
On 26/06/2023 04:34, Penny Zheng wrote:
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Function p2m_set_entry/__p2m_set_entry is responsible for inserting an entry
Hi Penny,
On 26/06/2023 04:34, Penny Zheng wrote:
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We inherit p2m_init() to do P2M initialization in MPU system,
On 26/06/2023 04:34, Penny Zheng wrote:
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VSTCR_EL2, Virtualization Secure Translation Control Register，is
the control
Hi Penny,
On 26/06/2023 04:34, Penny Zheng wrote:
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A set of function ioremap_xxx are designed to map deivce memory or
On 05/07/2023 11:16, Penny Zheng wrote:
Hi Ayan
Hi Penny,
On 2023/7/4 23:10, Ayan Kumar Halder wrote:
Hi Penny,
On 26/06/2023 04:34, Penny Zheng wrote:
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Hi Penny,
Most of these are specific to ARM_64, thus we can add "#ifdef
CONFIG_ARM_64" as follows :-
On 26/06/2023 04:34, Penny Zheng wrote:
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Hi Penny,
On 26/06/2023 04:34, Penny Zheng wrote:
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In function init_staticmem_pages, we need the access to static memory
On 26/06/2023 04:33, Penny Zheng wrote:
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So sorry for the long long wait before v3 serie, since I got sidetracked to
a
On 04/07/2023 12:44, Julien Grall wrote:
Hi,
On 04/07/2023 12:14, Ayan Kumar Halder wrote:
On 26/06/2023 04:33, Penny Zheng wrote:
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On 04/07/2023 12:47, Julien Grall wrote:
On 04/07/2023 11:36, Ayan Kumar Halder wrote:
Hi Penny,
Hi Ayan,
Hi Julien,
On 26/06/2023 04:33, Penny Zheng wrote:
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From: Wei Chen
There are lots of MMU specific code in head.S. This code will
Hi Penny,
On 26/06/2023 04:33, Penny Zheng wrote:
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This commit wants to introduce a new Kconfig CONFIG_HAS_MMU to guard
Hi Penny,
On 26/06/2023 04:33, Penny Zheng wrote:
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From: Wei Chen
At the moment, on MMU system, enable_mmu() will
Hi Penny,
On 26/06/2023 04:33, Penny Zheng wrote:
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From: Wei Chen
On Armv8-A, Xen has a fixed virtual start address
On 26/06/2023 04:34, Penny Zheng wrote:
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This commit expands xen_mpumap_update/xen_mpumap_update_entry to include
Hi Penny,
On 26/06/2023 04:34, Penny Zheng wrote:
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Xen is using page as the smallest granularity for memory managment.
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