Re: [PATCH v3 13/15] x86/cpu/intel: Bound the non-architectural constant_tsc model checks

2025-08-21 Thread Sohil Mehta
On 8/21/2025 12:34 PM, Sohil Mehta wrote: > On 8/21/2025 6:15 AM, David Woodhouse wrote: > >> Hm. My test host is INTEL_HASWELL_X (0x63f). For reasons which are >> unclear to me, QEMU doesn't set bit 8 of 0x8007 EDX unless I >> explicitly append ',+invtsc&#

Re: [PATCH v3 13/15] x86/cpu/intel: Bound the non-architectural constant_tsc model checks

2025-08-21 Thread Sohil Mehta
On 8/21/2025 6:15 AM, David Woodhouse wrote: > Hm. My test host is INTEL_HASWELL_X (0x63f). For reasons which are > unclear to me, QEMU doesn't set bit 8 of 0x8007 EDX unless I > explicitly append ',+invtsc' to the existing '-cpu host' on its command > line. So now my guest doesn't think it ha

Re: [PATCH v6 00/16] x86/mtrr: fix handling with PAT but without MTRR

2023-05-03 Thread Sohil Mehta
> Juergen Gross (16): > x86/mtrr: remove physical address size calculation > x86/mtrr: replace some constants with defines > x86/mtrr: support setting MTRR state for software defined MTRRs > x86/hyperv: set MTRR state when running as SEV-SNP Hyper-V guest > x86/xen: set MTRR state when ru