Hi Jan,
On 18/08/2023 09:14, Jan Beulich wrote:
On 18.08.2023 09:39, Julien Grall wrote:
On 18/08/2023 07:33, Jan Beulich wrote:
As an aside I wonder why they're here: They look like definitions of
processor registers, which aren't under our (Xen's) control.
I agree they are not under Xen's
Hi Juergen,
On 18/08/2023 09:25, Juergen Gross wrote:
On 18.08.23 10:05, Julien Grall wrote:
Hi,
On 18/08/2023 09:00, Juergen Gross wrote:
On 18.08.23 09:39, Julien Grall wrote:
Hi Jan,
On 18/08/2023 07:33, Jan Beulich wrote:
On 17.08.2023 23:43, Julien Grall wrote:
---
On 18.08.23 10:05, Julien Grall wrote:
Hi,
On 18/08/2023 09:00, Juergen Gross wrote:
On 18.08.23 09:39, Julien Grall wrote:
Hi Jan,
On 18/08/2023 07:33, Jan Beulich wrote:
On 17.08.2023 23:43, Julien Grall wrote:
--- a/xen/include/public/arch-arm.h
+++ b/xen/include/public/arch-arm.h
@@
On 18.08.2023 09:39, Julien Grall wrote:
> On 18/08/2023 07:33, Jan Beulich wrote:
>> As an aside I wonder why they're here: They look like definitions of
>> processor registers, which aren't under our (Xen's) control.
>
> I agree they are not under Xen's control. However, they are used by the
>
Hi,
On 18/08/2023 09:00, Juergen Gross wrote:
On 18.08.23 09:39, Julien Grall wrote:
Hi Jan,
On 18/08/2023 07:33, Jan Beulich wrote:
On 17.08.2023 23:43, Julien Grall wrote:
--- a/xen/include/public/arch-arm.h
+++ b/xen/include/public/arch-arm.h
@@ -339,36 +339,36 @@ typedef uint64_t
On 18.08.23 09:39, Julien Grall wrote:
Hi Jan,
On 18/08/2023 07:33, Jan Beulich wrote:
On 17.08.2023 23:43, Julien Grall wrote:
--- a/xen/include/public/arch-arm.h
+++ b/xen/include/public/arch-arm.h
@@ -339,36 +339,36 @@ typedef uint64_t xen_callback_t;
/* PSR bits (CPSR, SPSR) */
-#define
Hi Jan,
On 18/08/2023 07:33, Jan Beulich wrote:
On 17.08.2023 23:43, Julien Grall wrote:
--- a/xen/include/public/arch-arm.h
+++ b/xen/include/public/arch-arm.h
@@ -339,36 +339,36 @@ typedef uint64_t xen_callback_t;
/* PSR bits (CPSR, SPSR) */
-#define PSR_THUMB (1<<5)/*
On 17.08.2023 23:43, Julien Grall wrote:
> --- a/xen/include/public/arch-arm.h
> +++ b/xen/include/public/arch-arm.h
> @@ -339,36 +339,36 @@ typedef uint64_t xen_callback_t;
>
> /* PSR bits (CPSR, SPSR) */
>
> -#define PSR_THUMB (1<<5)/* Thumb Mode enable */
> -#define
Hi Julien,
> On Aug 18, 2023, at 05:43, Julien Grall wrote:
>
> From: Julien Grall
>
> The defines PSR_* are field in registers and always unsigned. So
> add 'U' to clarify.
>
> This should help with MISRA Rule 7.2.
>
> Signed-off-by: Julien Grall
Reviewed-by: Henry Wang
Tested-by: Henry
On Thu, 17 Aug 2023, Julien Grall wrote:
> From: Julien Grall
>
> The defines PSR_* are field in registers and always unsigned. So
> add 'U' to clarify.
>
> This should help with MISRA Rule 7.2.
>
> Signed-off-by: Julien Grall
Reviewed-by: Stefano Stabellini
> ---
>
From: Julien Grall
The defines PSR_* are field in registers and always unsigned. So
add 'U' to clarify.
This should help with MISRA Rule 7.2.
Signed-off-by: Julien Grall
---
xen/include/public/arch-arm.h | 52 +--
1 file changed, 26 insertions(+), 26
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