On Fri, 11 Dec 2020, Bertrand Marquis wrote:
> Hi Stefano,
>
> > On 10 Dec 2020, at 22:29, Stefano Stabellini wrote:
> >
> > On Thu, 10 Dec 2020, Bertrand Marquis wrote:
> >> Hi Stefano,
> >>
> >>> On 9 Dec 2020, at 19:38, Stefano Stabellini
> >>> wrote:
> >>>
> >>> On Wed, 9 Dec 2020, Bertr
Hi Stefano,
> On 10 Dec 2020, at 22:29, Stefano Stabellini wrote:
>
> On Thu, 10 Dec 2020, Bertrand Marquis wrote:
>> Hi Stefano,
>>
>>> On 9 Dec 2020, at 19:38, Stefano Stabellini wrote:
>>>
>>> On Wed, 9 Dec 2020, Bertrand Marquis wrote:
Add vsysreg emulation for registers trapped when
On Thu, 10 Dec 2020, Bertrand Marquis wrote:
> Hi Stefano,
>
> > On 9 Dec 2020, at 19:38, Stefano Stabellini wrote:
> >
> > On Wed, 9 Dec 2020, Bertrand Marquis wrote:
> >> Add vsysreg emulation for registers trapped when TID3 bit is activated
> >> in HSR.
> >> The emulation is returning the val
Hi Julien,
> On 9 Dec 2020, at 23:13, Julien Grall wrote:
>
>
>
> On 09/12/2020 16:30, Bertrand Marquis wrote:
>> Add vsysreg emulation for registers trapped when TID3 bit is activated
>> in HSR.
>> The emulation is returning the value stored in cpuinfo_guest structure
>> for know registers an
Hi Stefano,
> On 9 Dec 2020, at 19:38, Stefano Stabellini wrote:
>
> On Wed, 9 Dec 2020, Bertrand Marquis wrote:
>> Add vsysreg emulation for registers trapped when TID3 bit is activated
>> in HSR.
>> The emulation is returning the value stored in cpuinfo_guest structure
>> for know registers an
On 09/12/2020 16:30, Bertrand Marquis wrote:
Add vsysreg emulation for registers trapped when TID3 bit is activated
in HSR.
The emulation is returning the value stored in cpuinfo_guest structure
for know registers and is handling reserved registers as RAZ.
Signed-off-by: Bertrand Marquis
---
On Wed, 9 Dec 2020, Bertrand Marquis wrote:
> Add vsysreg emulation for registers trapped when TID3 bit is activated
> in HSR.
> The emulation is returning the value stored in cpuinfo_guest structure
> for know registers and is handling reserved registers as RAZ.
>
> Signed-off-by: Bertrand Marqui
Add vsysreg emulation for registers trapped when TID3 bit is activated
in HSR.
The emulation is returning the value stored in cpuinfo_guest structure
for know registers and is handling reserved registers as RAZ.
Signed-off-by: Bertrand Marquis
---
Changes in V2: Rebase
Changes in V3:
Fix commit