As MPU system only has one secure state, we have to use secure EL2 hypervisor
timer for Xen in secure EL2.
In this patch, we introduce a new Kconfig option ARM_SECURE_STATE and
a set of secure hypervisor timer registers CNTHPS_*_EL2.
We alias CNTHP_*_EL2 to CNTHPS_*_EL2 to keep the timer code flow unchanged.
Signed-off-by: Penny Zheng <penny.zh...@arm.com>
Signed-off-by: Wei Chen <wei.c...@arm.com>
---
v3:
- alias CNTHP_*_EL2 to CNTHPS_*_EL2 to avoid renaming
---
xen/arch/arm/Kconfig | 4 ++++
xen/arch/arm/include/asm/arm64/sysregs.h | 15 +++++++++++++++
2 files changed, 19 insertions(+)
diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index b2710c1c31..3f67aacbbf 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -92,6 +92,10 @@ config ARM_EFI
UEFI firmware. A UEFI stub is provided to allow Xen to
be booted as an EFI application.
+config ARM_SECURE_STATE
+ bool "Xen will run in Arm Secure State"
+ default n
+
config GICV3
bool "GICv3 driver"
depends on !NEW_VGIC
diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h
b/xen/arch/arm/include/asm/arm64/sysregs.h
index 96c025053b..ab0e6a97d3 100644
--- a/xen/arch/arm/include/asm/arm64/sysregs.h
+++ b/xen/arch/arm/include/asm/arm64/sysregs.h
@@ -514,6 +514,21 @@
#endif
+#ifdef CONFIG_ARM_SECURE_STATE
+/*
+ * The Armv8-R AArch64 architecture always executes code in Secure
+ * state with EL2 as the highest Exception.
+ *
+ * Hypervisor timer registers for Secure EL2.
+ */
+#define CNTHPS_TVAL_EL2 S3_4_C14_C5_0
+#define CNTHPS_CTL_EL2 S3_4_C14_C5_1
+#define CNTHPS_CVAL_EL2 S3_4_C14_C5_2
+#define CNTHP_TVAL_EL2 CNTHPS_TVAL_EL2
+#define CNTHP_CTL_EL2 CNTHPS_CTL_EL2
+#define CNTHP_CVAL_EL2 CNTHPS_CVAL_EL2
+#endif
+
/* Access to system registers */
#define WRITE_SYSREG64(v, name) do { \
--
2.25.1
