On Fri, Aug 04 2023 at 21:01, Peter Zijlstra wrote:
> On Fri, Aug 04, 2023 at 05:35:11PM +, Li, Xin3 wrote:
>> > > The commit d99015b1abbad ("x86: move entry_64.S register saving out of
>> > > the macros") introduced the changes to set orig_ax to -1, but I can't
>> > > see why it's required.
On Fri, Aug 04, 2023 at 05:35:11PM +, Li, Xin3 wrote:
> > > The IDT event delivery of X86_TRAP_DF, X86_TRAP_TS, X86_TRAP_NP,
> > > X86_TRAP_SS, X86_TRAP_GP, X86_TRAP_AC and X86_TRAP_CP pushes an error
> > > code into the orig_ax member of the pt_regs structure, and the error
> > > code is
> > The IDT event delivery of X86_TRAP_DF, X86_TRAP_TS, X86_TRAP_NP,
> > X86_TRAP_SS, X86_TRAP_GP, X86_TRAP_AC and X86_TRAP_CP pushes an error
> > code into the orig_ax member of the pt_regs structure, and the error
> > code is passed as the second argument of their C-handlers, although
> > the
> > On 04/08/2023 8:57 am, Xin Li wrote:
> >> I haven't checked Xen implications with this change, i.e., does Xen
> >> hypervisor need to adjust how it passes arguments to PV guests?
> >
> > This is an internal detail of how Linux handles data on it's stacks,
> > isn't it?
> >
> > The Xen code in
> On 04/08/2023 8:57 am, Xin Li wrote:
> > I haven't checked Xen implications with this change, i.e., does Xen
> > hypervisor need to adjust how it passes arguments to PV guests?
>
> This is an internal detail of how Linux handles data on it's stacks, isn't it?
Yes, it is completely internal to
On 04.08.23 12:25, Andrew Cooper wrote:
On 04/08/2023 8:57 am, Xin Li wrote:
I haven't checked Xen implications with this change, i.e., does Xen
hypervisor need to adjust how it passes arguments to PV guests?
This is an internal detail of how Linux handles data on it's stacks,
isn't it?
The
On 04/08/2023 8:57 am, Xin Li wrote:
> I haven't checked Xen implications with this change, i.e., does Xen
> hypervisor need to adjust how it passes arguments to PV guests?
This is an internal detail of how Linux handles data on it's stacks,
isn't it?
The Xen code in Linux will need adjustment
On Fri, Aug 04, 2023 at 12:57:34AM -0700, Xin Li wrote:
> The IDT event delivery of X86_TRAP_DF, X86_TRAP_TS, X86_TRAP_NP,
> X86_TRAP_SS, X86_TRAP_GP, X86_TRAP_AC and X86_TRAP_CP pushes an error
> code into the orig_ax member of the pt_regs structure, and the error
> code is passed as the second
The IDT event delivery of X86_TRAP_DF, X86_TRAP_TS, X86_TRAP_NP,
X86_TRAP_SS, X86_TRAP_GP, X86_TRAP_AC and X86_TRAP_CP pushes an error
code into the orig_ax member of the pt_regs structure, and the error
code is passed as the second argument of their C-handlers, although
the pt_regs structure is
