On 10/24/22 16:01, Ayan Kumar Halder wrote:
On 24/10/2022 12:35, Xenia Ragiadakou wrote:
Hi Ayan,
Hi Xenia,
On 10/24/22 14:00, Ayan Kumar Halder wrote:
On 21/10/2022 22:18, Xenia Ragiadakou wrote:
On 10/21/22 18:31, Ayan Kumar Halder wrote:
Hi Ayan
Hi Xenia,
Refer
On 24/10/2022 12:35, Xenia Ragiadakou wrote:
Hi Ayan,
Hi Xenia,
On 10/24/22 14:00, Ayan Kumar Halder wrote:
On 21/10/2022 22:18, Xenia Ragiadakou wrote:
On 10/21/22 18:31, Ayan Kumar Halder wrote:
Hi Ayan
Hi Xenia,
Refer https://elixir.bootlin.com/linux/v6.1-rc1/source/arch/arm64/ \
Hi Ayan,
On 10/24/22 14:00, Ayan Kumar Halder wrote:
On 21/10/2022 22:18, Xenia Ragiadakou wrote:
On 10/21/22 18:31, Ayan Kumar Halder wrote:
Hi Ayan
Hi Xenia,
Refer https://elixir.bootlin.com/linux/v6.1-rc1/source/arch/arm64/ \
include/asm/cputype.h#L14 , these macros are specific for
On 21/10/2022 22:18, Xenia Ragiadakou wrote:
On 10/21/22 18:31, Ayan Kumar Halder wrote:
Hi Ayan
Hi Xenia,
Refer https://elixir.bootlin.com/linux/v6.1-rc1/source/arch/arm64/ \
include/asm/cputype.h#L14 , these macros are specific for arm64.
When one computes MPIDR_LEVEL_SHIFT(3), it
On 10/21/22 18:31, Ayan Kumar Halder wrote:
Hi Ayan
Refer https://elixir.bootlin.com/linux/v6.1-rc1/source/arch/arm64/ \
include/asm/cputype.h#L14 , these macros are specific for arm64.
When one computes MPIDR_LEVEL_SHIFT(3), it crosses the width of a 32
bit register.
Refer
Refer https://elixir.bootlin.com/linux/v6.1-rc1/source/arch/arm64/ \
include/asm/cputype.h#L14 , these macros are specific for arm64.
When one computes MPIDR_LEVEL_SHIFT(3), it crosses the width of a 32
bit register.
Refer https://elixir.bootlin.com/linux/v6.1-rc1/source/arch/arm/include/ \