Re: [Xen-devel] [PATCH] x86/cpuidle: correct Cannon Lake residency MSRs

2019-11-15 Thread Andrew Cooper
On 15/11/2019 09:37, Jan Beulich wrote: > On 14.11.2019 20:28, Andrew Cooper wrote: >> On 14/11/2019 15:22, Jan Beulich wrote: >>> As per SDM rev 071 Cannon Lake has >>> - no CC3 residency MSR at 3FC, >>> - a CC1 residency MSR ar 660 (like various Atoms), >>> - a useless (always zero) CC3

Re: [Xen-devel] [PATCH] x86/cpuidle: correct Cannon Lake residency MSRs

2019-11-15 Thread Jan Beulich
On 14.11.2019 20:28, Andrew Cooper wrote: > On 14/11/2019 15:22, Jan Beulich wrote: >> As per SDM rev 071 Cannon Lake has >> - no CC3 residency MSR at 3FC, >> - a CC1 residency MSR ar 660 (like various Atoms), >> - a useless (always zero) CC3 residency MSR at 662. >> >> Signed-off-by: Jan Beulich

Re: [Xen-devel] [PATCH] x86/cpuidle: correct Cannon Lake residency MSRs

2019-11-14 Thread Andrew Cooper
On 14/11/2019 15:22, Jan Beulich wrote: > As per SDM rev 071 Cannon Lake has > - no CC3 residency MSR at 3FC, > - a CC1 residency MSR ar 660 (like various Atoms), > - a useless (always zero) CC3 residency MSR at 662. > > Signed-off-by: Jan Beulich > --- > Using the MSR cross reference in the same

[Xen-devel] [PATCH] x86/cpuidle: correct Cannon Lake residency MSRs

2019-11-14 Thread Jan Beulich
As per SDM rev 071 Cannon Lake has - no CC3 residency MSR at 3FC, - a CC1 residency MSR ar 660 (like various Atoms), - a useless (always zero) CC3 residency MSR at 662. Signed-off-by: Jan Beulich --- Using the MSR cross reference in the same SDM revision one might even get the impression that