On 2/25/19 10:26 AM, Jan Beulich wrote:
On 25.02.19 at 15:11, wrote:
>> On 25/02/2019 13:11, Jan Beulich wrote:
>>> For Intel, afaics, we indeed produce a blank CPUID leaf in
>>> all cases, so the behavior looks reasonably consistent. I would
>>> question though whether a blank CPUID leaf / t
>>> On 25.02.19 at 15:11, wrote:
> On 25/02/2019 13:11, Jan Beulich wrote:
>> For Intel, afaics, we indeed produce a blank CPUID leaf in
>> all cases, so the behavior looks reasonably consistent. I would
>> question though whether a blank CPUID leaf / the absence of any
>> counters wouldn't call f
On 25/02/2019 13:11, Jan Beulich wrote:
On 23.02.19 at 00:48, wrote:
>> On 2/22/19 5:44 PM, Andrew Cooper wrote:
>>> On 22/02/2019 21:58, Boris Ostrovsky wrote:
On 2/22/19 4:13 PM, Andrew Cooper wrote:
> vPMU isn't security supported, and in general guests can't access any of
>
>>> On 23.02.19 at 00:48, wrote:
> On 2/22/19 5:44 PM, Andrew Cooper wrote:
>> On 22/02/2019 21:58, Boris Ostrovsky wrote:
>>> On 2/22/19 4:13 PM, Andrew Cooper wrote:
vPMU isn't security supported, and in general guests can't access any of
the
performance counter MSRs. However, t
On 2/22/19 5:44 PM, Andrew Cooper wrote:
> On 22/02/2019 21:58, Boris Ostrovsky wrote:
>> On 2/22/19 4:13 PM, Andrew Cooper wrote:
>>> vPMU isn't security supported, and in general guests can't access any of the
>>> performance counter MSRs. However, the RDPMC instruction isn't intercepted,
>>> me
On 22/02/2019 21:58, Boris Ostrovsky wrote:
> On 2/22/19 4:13 PM, Andrew Cooper wrote:
>> vPMU isn't security supported, and in general guests can't access any of the
>> performance counter MSRs. However, the RDPMC instruction isn't intercepted,
>> meaning that guest software can read the instanta
On 2/22/19 4:13 PM, Andrew Cooper wrote:
> vPMU isn't security supported, and in general guests can't access any of the
> performance counter MSRs. However, the RDPMC instruction isn't intercepted,
> meaning that guest software can read the instantaneous counter values.
>
> When vPMU isn't configu
vPMU isn't security supported, and in general guests can't access any of the
performance counter MSRs. However, the RDPMC instruction isn't intercepted,
meaning that guest software can read the instantaneous counter values.
When vPMU isn't configured, intercept RDPMC and unconditionally fail it a
