At the time of writing, the spec is available from:
https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf
Future hardware (Zen v2) is expect to have hardware MSR_SPEC_CTRL support,
including SPEC_CTRL.SSBD, and with the expectation that
On Mon, Dec 03, 2018 at 04:18:17PM +, Andy Cooper wrote:
> At the time of writing, the spec is available from:
>
>
> https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreBypassDisable_Whitepaper_final.pdf
>
> Future hardware (Zen v2) is expect to have hardware MSR_SP
>>> On 03.12.18 at 17:18, wrote:
> At the time of writing, the spec is available from:
>
>
> https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreB
> ypassDisable_Whitepaper_final.pdf
>
> Future hardware (Zen v2) is expect to have hardware MSR_SPEC_CTRL support,
> incl
On 05/12/2018 16:39, Jan Beulich wrote:
On 03.12.18 at 17:18, wrote:
>> At the time of writing, the spec is available from:
>>
>>
>> https://developer.amd.com/wp-content/resources/124441_AMD64_SpeculativeStoreB
>>
>> ypassDisable_Whitepaper_final.pdf
>>
>> Future hardware (Zen v2) is exp
>>> On 05.12.18 at 18:50, wrote:
> On 05/12/2018 16:39, Jan Beulich wrote:
> On 03.12.18 at 17:18, wrote:
>>> As an alternative, MSR_VIRT_SPEC_CTRL is specified as an architectural
>>> control
>>> (with semantics equivilent to MSR_SPEC_CTRL) which is provided by the
>>> hypervisor. This abs
On 06/12/2018 08:49, Jan Beulich wrote:
+{"amd_stibp",0x8008, NA, CPUID_REG_EBX, 15, 1},
+{"amd_ssbd", 0x8008, NA, CPUID_REG_EBX, 24, 1},
+{"virt_sc_ssbd", 0x8008, NA, CPUID_REG_EBX, 25, 1},
+{"amd_ssb_no", 0x8008, NA,
