Re: [Xen-devel] [PATCH 9/9] x86/vmx: Don't leak EFER.NXE into guest context

2018-05-25 Thread Andrew Cooper
On 25/05/18 12:36, Jan Beulich wrote: On 25.05.18 at 10:36, wrote: >> On 25/05/2018 08:49, Jan Beulich wrote: >> On 22.05.18 at 13:20, wrote: @@ -1650,22 +1641,81 @@ static void vmx_update_guest_cr(struct vcpu *v, >> unsigned int cr, static void vmx_update_guest_efer(s

Re: [Xen-devel] [PATCH 9/9] x86/vmx: Don't leak EFER.NXE into guest context

2018-05-25 Thread Jan Beulich
>>> On 25.05.18 at 10:36, wrote: > On 25/05/2018 08:49, Jan Beulich wrote: > On 22.05.18 at 13:20, wrote: >>> @@ -1650,22 +1641,81 @@ static void vmx_update_guest_cr(struct vcpu *v, > unsigned int cr, >>> >>> static void vmx_update_guest_efer(struct vcpu *v) >>> { >>> -unsigned long

Re: [Xen-devel] [PATCH 9/9] x86/vmx: Don't leak EFER.NXE into guest context

2018-05-25 Thread Andrew Cooper
On 25/05/2018 08:49, Jan Beulich wrote: On 22.05.18 at 13:20, wrote: >> @@ -1650,22 +1641,81 @@ static void vmx_update_guest_cr(struct vcpu *v, >> unsigned int cr, >> >> static void vmx_update_guest_efer(struct vcpu *v) >> { >> -unsigned long vm_entry_value; >> +unsigned long ent

Re: [Xen-devel] [PATCH 9/9] x86/vmx: Don't leak EFER.NXE into guest context

2018-05-25 Thread Jan Beulich
>>> On 22.05.18 at 13:20, wrote: > @@ -1650,22 +1641,81 @@ static void vmx_update_guest_cr(struct vcpu *v, > unsigned int cr, > > static void vmx_update_guest_efer(struct vcpu *v) > { > -unsigned long vm_entry_value; > +unsigned long entry_ctls, guest_efer = v->arch.hvm_vcpu.guest_efe

Re: [Xen-devel] [PATCH 9/9] x86/vmx: Don't leak EFER.NXE into guest context

2018-05-25 Thread Andrew Cooper
On 25/05/2018 08:27, Jan Beulich wrote: On 24.05.18 at 18:48, wrote: >> On 24/05/18 17:01, Roger Pau Monné wrote: >>> On Tue, May 22, 2018 at 12:20:46PM +0100, Andrew Cooper wrote: --- a/xen/include/asm-x86/hvm/vmx/vmcs.h +++ b/xen/include/asm-x86/hvm/vmx/vmcs.h @@ -306,6 +306,

Re: [Xen-devel] [PATCH 9/9] x86/vmx: Don't leak EFER.NXE into guest context

2018-05-25 Thread Jan Beulich
>>> On 24.05.18 at 18:48, wrote: > On 24/05/18 17:01, Roger Pau Monné wrote: >> On Tue, May 22, 2018 at 12:20:46PM +0100, Andrew Cooper wrote: >>> --- a/xen/include/asm-x86/hvm/vmx/vmcs.h >>> +++ b/xen/include/asm-x86/hvm/vmx/vmcs.h >>> @@ -306,6 +306,8 @@ extern u64 vmx_ept_vpid_cap; >>> (vm

Re: [Xen-devel] [PATCH 9/9] x86/vmx: Don't leak EFER.NXE into guest context

2018-05-24 Thread Tim Deegan
At 12:20 +0100 on 22 May (1526991646), Andrew Cooper wrote: > Intel hardware only uses 4 bits in MSR_EFER. Changes to LME and LMA are > handled automatically via the VMENTRY_CTLS.IA32E_MODE bit. > > SCE is handled by ad-hoc logic in context_switch(), vmx_restore_guest_msrs() > and vmx_update_gues

Re: [Xen-devel] [PATCH 9/9] x86/vmx: Don't leak EFER.NXE into guest context

2018-05-24 Thread Andrew Cooper
On 24/05/18 17:01, Roger Pau Monné wrote: > On Tue, May 22, 2018 at 12:20:46PM +0100, Andrew Cooper wrote: >> Intel hardware only uses 4 bits in MSR_EFER. Changes to LME and LMA are >> handled automatically via the VMENTRY_CTLS.IA32E_MODE bit. >> >> SCE is handled by ad-hoc logic in context_switch

Re: [Xen-devel] [PATCH 9/9] x86/vmx: Don't leak EFER.NXE into guest context

2018-05-24 Thread Roger Pau Monné
On Tue, May 22, 2018 at 12:20:46PM +0100, Andrew Cooper wrote: > Intel hardware only uses 4 bits in MSR_EFER. Changes to LME and LMA are > handled automatically via the VMENTRY_CTLS.IA32E_MODE bit. > > SCE is handled by ad-hoc logic in context_switch(), vmx_restore_guest_msrs() > and vmx_update_g

[Xen-devel] [PATCH 9/9] x86/vmx: Don't leak EFER.NXE into guest context

2018-05-22 Thread Andrew Cooper
Intel hardware only uses 4 bits in MSR_EFER. Changes to LME and LMA are handled automatically via the VMENTRY_CTLS.IA32E_MODE bit. SCE is handled by ad-hoc logic in context_switch(), vmx_restore_guest_msrs() and vmx_update_guest_efer(), and works by altering the host SCE value to match the settin