Hi Stefano,
On 23/01/2019 23:42, Stefano Stabellini wrote:
On Wed, 28 Nov 2018, Julien Grall wrote:
+/*
* Flush local TLB for the domain to prevent wrong TLB translation
* when running multiple vCPU of the same domain on a single pCPU.
*/
if ( *last_vcpu_ran !=
On Wed, 28 Nov 2018, Julien Grall wrote:
> The EL1 translation regime is out-of-context when running at EL2. This
> means the processor cannot speculate memory accesses using the registers
> associated to that regime.
>
> An isb() is only need if Xen is going to use the translation regime
On 21/12/2018 14:43, Andrii Anisov wrote:
On 28.11.18 18:49, Julien Grall wrote:
if ( *last_vcpu_ran != INVALID_VCPU_ID && *last_vcpu_ran != n->vcpu_id )
+ {
flush_tlb_local();
+ }
BTW, missed mentioning that curly braces above are odd by coding style.
It is not
On 28.11.18 18:49, Julien Grall wrote:
if ( *last_vcpu_ran != INVALID_VCPU_ID && *last_vcpu_ran != n->vcpu_id )
+{
flush_tlb_local();
+}
BTW, missed mentioning that curly braces above are odd by coding style.
--
Sincerely,
Andrii Anisov.
On 28.11.18 18:49, Julien Grall wrote:
The EL1 translation regime is out-of-context when running at EL2. This
means the processor cannot speculate memory accesses using the registers
associated to that regime.
An isb() is only need if Xen is going to use the translation regime
before
The EL1 translation regime is out-of-context when running at EL2. This
means the processor cannot speculate memory accesses using the registers
associated to that regime.
An isb() is only need if Xen is going to use the translation regime
before returning to the guest (exception returns will
