When using posted interrupts on Intel hardware it's possible that the
vCPU resumes execution with a stale local APIC IRR register because
depending on the interrupts to be injected vlapic_has_pending_irq
might not be called, and thus PIR won't be synced into IRR.
Fix this by making sure PIR is alw
On 18.11.2019 11:16, Roger Pau Monne wrote:
> When using posted interrupts on Intel hardware it's possible that the
> vCPU resumes execution with a stale local APIC IRR register because
> depending on the interrupts to be injected vlapic_has_pending_irq
> might not be called, and thus PIR won't be
On 18.11.2019 11:16, Roger Pau Monne wrote:
> @@ -1954,48 +1952,28 @@ static void __vmx_deliver_posted_interrupt(struct
> vcpu *v)
> * 2. The target vCPU is the current vCPU and we're in non-interrupt
> * context.
> */
> -if ( running && (in_irq() || (v != current)) )
> -
On Mon, Nov 18, 2019 at 01:01:58PM +0100, Jan Beulich wrote:
> On 18.11.2019 11:16, Roger Pau Monne wrote:
> > When using posted interrupts on Intel hardware it's possible that the
> > vCPU resumes execution with a stale local APIC IRR register because
> > depending on the interrupts to be injected
On 18.11.2019 14:46, Roger Pau Monné wrote:
> On Mon, Nov 18, 2019 at 01:01:58PM +0100, Jan Beulich wrote:
>> On 18.11.2019 11:16, Roger Pau Monne wrote:
>>> When using posted interrupts on Intel hardware it's possible that the
>>> vCPU resumes execution with a stale local APIC IRR register becaus
On Mon, Nov 18, 2019 at 01:26:46PM +0100, Jan Beulich wrote:
> On 18.11.2019 11:16, Roger Pau Monne wrote:
> > @@ -1954,48 +1952,28 @@ static void __vmx_deliver_posted_interrupt(struct
> > vcpu *v)
> > * 2. The target vCPU is the current vCPU and we're in non-interrupt
> > * context.
>
On 18.11.2019 15:03, Roger Pau Monné wrote:
> On Mon, Nov 18, 2019 at 01:26:46PM +0100, Jan Beulich wrote:
>> On 18.11.2019 11:16, Roger Pau Monne wrote:
>>> @@ -1954,48 +1952,28 @@ static void __vmx_deliver_posted_interrupt(struct
>>> vcpu *v)
>>> * 2. The target vCPU is the current vCPU a
On Mon, Nov 18, 2019 at 03:00:00PM +0100, Jan Beulich wrote:
> On 18.11.2019 14:46, Roger Pau Monné wrote:
> > On Mon, Nov 18, 2019 at 01:01:58PM +0100, Jan Beulich wrote:
> >> On 18.11.2019 11:16, Roger Pau Monne wrote:
> >>> When using posted interrupts on Intel hardware it's possible that the
>
On Mon, Nov 18, 2019 at 03:19:50PM +0100, Jan Beulich wrote:
> On 18.11.2019 15:03, Roger Pau Monné wrote:
> > On Mon, Nov 18, 2019 at 01:26:46PM +0100, Jan Beulich wrote:
> >> On 18.11.2019 11:16, Roger Pau Monne wrote:
> >>> @@ -1954,48 +1952,28 @@ static void __vmx_deliver_posted_interrupt(stru
On 18.11.2019 15:20, Roger Pau Monné wrote:
> On Mon, Nov 18, 2019 at 03:00:00PM +0100, Jan Beulich wrote:
>> On 18.11.2019 14:46, Roger Pau Monné wrote:
>>> On Mon, Nov 18, 2019 at 01:01:58PM +0100, Jan Beulich wrote:
On 18.11.2019 11:16, Roger Pau Monne wrote:
> When using posted inter
On 18.11.2019 15:55, Roger Pau Monné wrote:
> On Mon, Nov 18, 2019 at 03:19:50PM +0100, Jan Beulich wrote:
>> On 18.11.2019 15:03, Roger Pau Monné wrote:
>>> On Mon, Nov 18, 2019 at 01:26:46PM +0100, Jan Beulich wrote:
On 18.11.2019 11:16, Roger Pau Monne wrote:
> @@ -1954,48 +1952,28 @@
On Mon, Nov 18, 2019 at 05:00:29PM +0100, Jan Beulich wrote:
> On 18.11.2019 15:20, Roger Pau Monné wrote:
> > On Mon, Nov 18, 2019 at 03:00:00PM +0100, Jan Beulich wrote:
> >> On 18.11.2019 14:46, Roger Pau Monné wrote:
> >>> On Mon, Nov 18, 2019 at 01:01:58PM +0100, Jan Beulich wrote:
> On
> From: Roger Pau Monné [mailto:roger@citrix.com]
> Sent: Thursday, November 21, 2019 5:26 PM
>
> On Mon, Nov 18, 2019 at 05:00:29PM +0100, Jan Beulich wrote:
> > On 18.11.2019 15:20, Roger Pau Monné wrote:
> > > On Mon, Nov 18, 2019 at 03:00:00PM +0100, Jan Beulich wrote:
> > >> On 18.11.201
> From: Roger Pau Monné
> Sent: Thursday, November 21, 2019 5:26 PM
>
> On Mon, Nov 18, 2019 at 05:00:29PM +0100, Jan Beulich wrote:
> > On 18.11.2019 15:20, Roger Pau Monné wrote:
> > > On Mon, Nov 18, 2019 at 03:00:00PM +0100, Jan Beulich wrote:
> > >> On 18.11.2019 14:46, Roger Pau Monné wro
> From: Roger Pau Monné
> Sent: Monday, November 18, 2019 10:56 PM
>
> On Mon, Nov 18, 2019 at 03:19:50PM +0100, Jan Beulich wrote:
> > On 18.11.2019 15:03, Roger Pau Monné wrote:
> > > On Mon, Nov 18, 2019 at 01:26:46PM +0100, Jan Beulich wrote:
> > >> On 18.11.2019 11:16, Roger Pau Monne wrote
On Wed, Nov 27, 2019 at 02:07:16AM +, Tian, Kevin wrote:
> > From: Roger Pau Monné
> > Sent: Monday, November 18, 2019 10:56 PM
> >
> > On Mon, Nov 18, 2019 at 03:19:50PM +0100, Jan Beulich wrote:
> > > On 18.11.2019 15:03, Roger Pau Monné wrote:
> > > > On Mon, Nov 18, 2019 at 01:26:46PM +0
On 27.11.2019 12:03, Roger Pau Monné wrote:
> On Wed, Nov 27, 2019 at 02:07:16AM +, Tian, Kevin wrote:
>> Then what's the difference from original logic?
>
> The original logic is:
>
> if ( running && (in_irq() || (v != current)) )
> {
> unsigned int cpu = v->processor;
>
>
On Wed, Nov 27, 2019 at 12:16:37PM +0100, Jan Beulich wrote:
> On 27.11.2019 12:03, Roger Pau Monné wrote:
> > On Wed, Nov 27, 2019 at 02:07:16AM +, Tian, Kevin wrote:
> >> Then what's the difference from original logic?
> >
> > The original logic is:
> >
> > if ( running && (in_irq() || (v
On 27.11.2019 12:29, Roger Pau Monné wrote:
> On Wed, Nov 27, 2019 at 12:16:37PM +0100, Jan Beulich wrote:
>> On 27.11.2019 12:03, Roger Pau Monné wrote:
>>> On Wed, Nov 27, 2019 at 02:07:16AM +, Tian, Kevin wrote:
Then what's the difference from original logic?
>>>
>>> The original logi
On Wed, Nov 27, 2019 at 12:34:09PM +0100, Jan Beulich wrote:
> On 27.11.2019 12:29, Roger Pau Monné wrote:
> > On Wed, Nov 27, 2019 at 12:16:37PM +0100, Jan Beulich wrote:
> >> On 27.11.2019 12:03, Roger Pau Monné wrote:
> >>> On Wed, Nov 27, 2019 at 02:07:16AM +, Tian, Kevin wrote:
> Th
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