Re: [Xen-devel] [PATCH v2 10/10] x86: Handle new asynchronous exit qualification

2018-06-29 Thread Andrew Cooper
On 29/06/18 16:22, Jan Beulich wrote: On 30.05.18 at 15:28, wrote: >> Using EPT to translate PT output addresses introduces the possibility of >> taking events on PT output reads and writes. Event possibilities include >> EPT violations, EPT misconfigurations, PML log-full VM exits, and APIC

Re: [Xen-devel] [PATCH v2 10/10] x86: Handle new asynchronous exit qualification

2018-06-29 Thread Jan Beulich
>>> On 30.05.18 at 15:28, wrote: > Using EPT to translate PT output addresses introduces the possibility of > taking events on PT output reads and writes. Event possibilities include > EPT violations, EPT misconfigurations, PML log-full VM exits, and APIC > access VM exits. > EPT violations: > a.

[Xen-devel] [PATCH v2 10/10] x86: Handle new asynchronous exit qualification

2018-05-30 Thread Luwei Kang
Using EPT to translate PT output addresses introduces the possibility of taking events on PT output reads and writes. Event possibilities include EPT violations, EPT misconfigurations, PML log-full VM exits, and APIC access VM exits. EPT violations: a. Intel PT buffer is a MMIO address in guest. A