Re: [Xen-devel] [PATCH v3] xen/arm: Handle unimplemented VGICv3 dist registers as RAZ/WI

2020-02-10 Thread Jeff Kubascik
Hey Julien, On 2/8/2020 7:05 AM, Julien Grall wrote: > Hi Jeff, > > As you now handle GICR register, I would drop "dist" from the title. > Good catch, I missed this in the title. > On 04/02/2020 19:51, Jeff Kubascik wrote: >> Per the ARM Generic Interrupt Controller Architecture Specification

Re: [Xen-devel] [PATCH v3] xen/arm: Handle unimplemented VGICv3 dist registers as RAZ/WI

2020-02-08 Thread Julien Grall
Hi Jeff, As you now handle GICR register, I would drop "dist" from the title. On 04/02/2020 19:51, Jeff Kubascik wrote: Per the ARM Generic Interrupt Controller Architecture Specification (ARM IHI 0069E), reserved registers should generally be treated as RAZ/WI. To simplify the VGICv3 design

[Xen-devel] [PATCH v3] xen/arm: Handle unimplemented VGICv3 dist registers as RAZ/WI

2020-02-04 Thread Jeff Kubascik
Per the ARM Generic Interrupt Controller Architecture Specification (ARM IHI 0069E), reserved registers should generally be treated as RAZ/WI. To simplify the VGICv3 design and improve guest compatibility, treat the default case for GICD and GICR registers as read_as_zero/write_ignore.