>>> On 29.11.18 at 14:44, wrote:
> I cannot see how interactions with a device with half-mapped BARs
> could trigger aborts that cannot be triggered when the device has
> fully mapped BARs. Ie: if there's indeed a way to trigger such aborts
> it would also be possible to do so with fully mapped
On Thu, Nov 29, 2018 at 03:41:07AM -0700, Jan Beulich wrote:
> >>> On 29.11.18 at 11:25, wrote:
> > On Thu, Nov 29, 2018 at 02:25:02AM -0700, Jan Beulich wrote:
> >> >>> On 28.11.18 at 18:48, wrote:
> >> > On Wed, Nov 28, 2018 at 10:04:33AM -0700, Jan Beulich wrote:
> >> >> >>> On 28.11.18 at
>>> On 29.11.18 at 11:25, wrote:
> On Thu, Nov 29, 2018 at 02:25:02AM -0700, Jan Beulich wrote:
>> >>> On 28.11.18 at 18:48, wrote:
>> > On Wed, Nov 28, 2018 at 10:04:33AM -0700, Jan Beulich wrote:
>> >> >>> On 28.11.18 at 17:54, wrote:
>> >> > On Wed, Nov 28, 2018 at 09:22:16AM -0700, Jan
On Thu, Nov 29, 2018 at 02:25:02AM -0700, Jan Beulich wrote:
> >>> On 28.11.18 at 18:48, wrote:
> > On Wed, Nov 28, 2018 at 10:04:33AM -0700, Jan Beulich wrote:
> >> >>> On 28.11.18 at 17:54, wrote:
> >> > On Wed, Nov 28, 2018 at 09:22:16AM -0700, Jan Beulich wrote:
> >> >> >>> On 28.11.18 at
>>> On 28.11.18 at 18:48, wrote:
> On Wed, Nov 28, 2018 at 10:04:33AM -0700, Jan Beulich wrote:
>> >>> On 28.11.18 at 17:54, wrote:
>> > On Wed, Nov 28, 2018 at 09:22:16AM -0700, Jan Beulich wrote:
>> >> >>> On 28.11.18 at 16:41, wrote:
>> >> > My plan is that DomUs won't be allowed to toggle
On Wed, Nov 28, 2018 at 10:04:33AM -0700, Jan Beulich wrote:
> >>> On 28.11.18 at 17:54, wrote:
> > On Wed, Nov 28, 2018 at 09:22:16AM -0700, Jan Beulich wrote:
> >> >>> On 28.11.18 at 16:41, wrote:
> >> > My plan is that DomUs won't be allowed to toggle the memory decoding
> >> > bit, and it's
>>> On 28.11.18 at 17:54, wrote:
> On Wed, Nov 28, 2018 at 09:22:16AM -0700, Jan Beulich wrote:
>> >>> On 28.11.18 at 16:41, wrote:
>> > My plan is that DomUs won't be allowed to toggle the memory decoding
>> > bit, and it's going to be always enabled, like it's currently done for
>> >
On Wed, Nov 28, 2018 at 09:22:16AM -0700, Jan Beulich wrote:
> >>> On 28.11.18 at 16:41, wrote:
> > On Wed, Nov 28, 2018 at 06:01:12AM -0700, Jan Beulich wrote:
> >> >>> On 28.11.18 at 11:09, wrote:
> >> > Hello,
> >> >
> >> > While doing the recent vPCI fixes and also working on SR-IOV support
>>> On 28.11.18 at 16:41, wrote:
> On Wed, Nov 28, 2018 at 06:01:12AM -0700, Jan Beulich wrote:
>> >>> On 28.11.18 at 11:09, wrote:
>> > Hello,
>> >
>> > While doing the recent vPCI fixes and also working on SR-IOV support
>> > I've been thinking about how vPCI handles writes to PCI registers
On Wed, Nov 28, 2018 at 06:01:12AM -0700, Jan Beulich wrote:
> >>> On 28.11.18 at 11:09, wrote:
> > Hello,
> >
> > While doing the recent vPCI fixes and also working on SR-IOV support
> > I've been thinking about how vPCI handles writes to PCI registers that
> > imply modifications to the p2m
>>> On 28.11.18 at 11:09, wrote:
> Hello,
>
> While doing the recent vPCI fixes and also working on SR-IOV support
> I've been thinking about how vPCI handles writes to PCI registers that
> imply modifications to the p2m for PVH Dom0.
>
> When memory decoding or ROM BARs are enabled Xen
Hello,
While doing the recent vPCI fixes and also working on SR-IOV support
I've been thinking about how vPCI handles writes to PCI registers that
imply modifications to the p2m for PVH Dom0.
When memory decoding or ROM BARs are enabled Xen performs the
following flow:
1. Create a rangeset with
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