On Mon, 20 Jul 2020, Rob Herring wrote:
> On Mon, Jul 20, 2020 at 5:24 PM Stefano Stabellini
> wrote:
> >
> > + Rob Herring
> >
> > On Fri, 17 Jul 2020, Bertrand Marquis wrote:
> > > >> Regarding the DT entry, this is not coming from us and this is already
> > > >> defined this way in existing
> On 21 Jul 2020, at 12:23 am, Stefano Stabellini
> wrote:
>
> On Fri, 17 Jul 2020, Bertrand Marquis wrote:
>>> On 17 Jul 2020, at 16:06, Jan Beulich wrote:
>>>
>>> On 17.07.2020 15:59, Bertrand Marquis wrote:
> On 17 Jul 2020, at 15:19, Jan Beulich wrote:
>
> On
On Mon, Jul 20, 2020 at 5:24 PM Stefano Stabellini
wrote:
>
> + Rob Herring
>
> On Fri, 17 Jul 2020, Bertrand Marquis wrote:
> > >> Regarding the DT entry, this is not coming from us and this is already
> > >> defined this way in existing DTBs, we just reuse the existing entry.
> > >
> > > Is it
On Fri, 17 Jul 2020, Bertrand Marquis wrote:
> > On 17 Jul 2020, at 16:06, Jan Beulich wrote:
> >
> > On 17.07.2020 15:59, Bertrand Marquis wrote:
> >>
> >>
> >>> On 17 Jul 2020, at 15:19, Jan Beulich wrote:
> >>>
> >>> On 17.07.2020 15:14, Bertrand Marquis wrote:
> > On 17 Jul 2020, at
+ Rob Herring
On Fri, 17 Jul 2020, Bertrand Marquis wrote:
> >> Regarding the DT entry, this is not coming from us and this is already
> >> defined this way in existing DTBs, we just reuse the existing entry.
> >
> > Is it possible to standardize the property and drop the linux prefix?
>
>
On 18.07.20 14:24, Julien Grall wrote:
Hello Julien
On 17/07/2020 20:17, Oleksandr wrote:
I would like to clarify regarding an IOMMU driver changes which
should be done to support PCI pass-through properly.
Design document mentions about SMMU, but Xen also supports IPMMU-VMSA
(under
Hi Roger,
On 20/07/2020 09:47, Roger Pau Monné wrote:
On Fri, Jul 17, 2020 at 05:18:46PM +0100, Julien Grall wrote:
Do you really need to specify the ECAM and MMIO regions there?
You need to define those values somewhere :). The layout is only shared
between the tools and the hypervisor. I
On Fri, Jul 17, 2020 at 05:18:46PM +0100, Julien Grall wrote:
>
>
> On 17/07/2020 17:08, Roger Pau Monné wrote:
> > On Fri, Jul 17, 2020 at 03:51:47PM +, Bertrand Marquis wrote:
> > >
> > >
> > > > On 17 Jul 2020, at 17:30, Roger Pau Monné wrote:
> > > >
> > > > On Fri, Jul 17, 2020 at
On Sat, Jul 18, 2020 at 09:49:43AM +, Bertrand Marquis wrote:
>
>
> > On 17 Jul 2020, at 17:55, Roger Pau Monné wrote:
> >
> > On Fri, Jul 17, 2020 at 03:21:57PM +, Bertrand Marquis wrote:
> >>> On 17 Jul 2020, at 16:31, Roger Pau Monné wrote:
> >>> On Fri, Jul 17, 2020 at 01:22:19PM
On 17/07/2020 20:17, Oleksandr wrote:
I would like to clarify regarding an IOMMU driver changes which should
be done to support PCI pass-through properly.
Design document mentions about SMMU, but Xen also supports IPMMU-VMSA
(under tech preview now). It would be really nice if the required
> On 17 Jul 2020, at 21:17, Oleksandr wrote:
>
>
> On 17.07.20 19:18, Julien Grall wrote:
>
> Hello Bertrand
>
> [two threads with the same name are shown in my mail client, so not
> completely sure I am asking in the correct one]
>
>>
>>
>> On 17/07/2020 17:08, Roger Pau Monné wrote:
> On 17 Jul 2020, at 17:55, Roger Pau Monné wrote:
>
> On Fri, Jul 17, 2020 at 03:21:57PM +, Bertrand Marquis wrote:
>>> On 17 Jul 2020, at 16:31, Roger Pau Monné wrote:
>>> On Fri, Jul 17, 2020 at 01:22:19PM +, Bertrand Marquis wrote:
> On 17 Jul 2020, at 13:16, Roger Pau Monné
On 17.07.20 19:18, Julien Grall wrote:
Hello Bertrand
[two threads with the same name are shown in my mail client, so not
completely sure I am asking in the correct one]
On 17/07/2020 17:08, Roger Pau Monné wrote:
On Fri, Jul 17, 2020 at 03:51:47PM +, Bertrand Marquis wrote:
On
On 17/07/2020 17:08, Roger Pau Monné wrote:
On Fri, Jul 17, 2020 at 03:51:47PM +, Bertrand Marquis wrote:
On 17 Jul 2020, at 17:30, Roger Pau Monné wrote:
On Fri, Jul 17, 2020 at 03:23:57PM +, Bertrand Marquis wrote:
On 17 Jul 2020, at 17:05, Roger Pau Monné wrote:
On Fri,
On Fri, Jul 17, 2020 at 03:51:47PM +, Bertrand Marquis wrote:
>
>
> > On 17 Jul 2020, at 17:30, Roger Pau Monné wrote:
> >
> > On Fri, Jul 17, 2020 at 03:23:57PM +, Bertrand Marquis wrote:
> >>
> >>
> >>> On 17 Jul 2020, at 17:05, Roger Pau Monné wrote:
> >>>
> >>> On Fri, Jul 17,
On Fri, Jul 17, 2020 at 03:21:57PM +, Bertrand Marquis wrote:
> > On 17 Jul 2020, at 16:31, Roger Pau Monné wrote:
> > On Fri, Jul 17, 2020 at 01:22:19PM +, Bertrand Marquis wrote:
> >>> On 17 Jul 2020, at 13:16, Roger Pau Monné wrote:
> * ACS capability is disable for ARM as of now
> On 17 Jul 2020, at 17:30, Roger Pau Monné wrote:
>
> On Fri, Jul 17, 2020 at 03:23:57PM +, Bertrand Marquis wrote:
>>
>>
>>> On 17 Jul 2020, at 17:05, Roger Pau Monné wrote:
>>>
>>> On Fri, Jul 17, 2020 at 02:49:20PM +, Bertrand Marquis wrote:
> On 17 Jul 2020, at
On Fri, Jul 17, 2020 at 03:23:57PM +, Bertrand Marquis wrote:
>
>
> > On 17 Jul 2020, at 17:05, Roger Pau Monné wrote:
> >
> > On Fri, Jul 17, 2020 at 02:49:20PM +, Bertrand Marquis wrote:
> >>
> >>
> >>> On 17 Jul 2020, at 16:41, Roger Pau Monné wrote:
> >>>
> >>> On Fri, Jul 17,
> On 17 Jul 2020, at 17:05, Roger Pau Monné wrote:
>
> On Fri, Jul 17, 2020 at 02:49:20PM +, Bertrand Marquis wrote:
>>
>>
>>> On 17 Jul 2020, at 16:41, Roger Pau Monné wrote:
>>>
>>> On Fri, Jul 17, 2020 at 02:34:55PM +, Bertrand Marquis wrote:
> On 17 Jul 2020, at
> On 17 Jul 2020, at 16:31, Roger Pau Monné wrote:
>
> On Fri, Jul 17, 2020 at 01:22:19PM +, Bertrand Marquis wrote:
>>
>>
>>> On 17 Jul 2020, at 13:16, Roger Pau Monné wrote:
>>>
>>> I've wrapped the email to 80 columns in order to make it easier to
>>> reply.
>>>
>>> Thanks for
On Fri, Jul 17, 2020 at 02:49:20PM +, Bertrand Marquis wrote:
>
>
> > On 17 Jul 2020, at 16:41, Roger Pau Monné wrote:
> >
> > On Fri, Jul 17, 2020 at 02:34:55PM +, Bertrand Marquis wrote:
> >>
> >>
> >>> On 17 Jul 2020, at 16:06, Jan Beulich wrote:
> >>>
> >>> On 17.07.2020 15:59,
> On 17 Jul 2020, at 16:41, Roger Pau Monné wrote:
>
> On Fri, Jul 17, 2020 at 02:34:55PM +, Bertrand Marquis wrote:
>>
>>
>>> On 17 Jul 2020, at 16:06, Jan Beulich wrote:
>>>
>>> On 17.07.2020 15:59, Bertrand Marquis wrote:
> On 17 Jul 2020, at 15:19, Jan Beulich
On Fri, Jul 17, 2020 at 02:34:55PM +, Bertrand Marquis wrote:
>
>
> > On 17 Jul 2020, at 16:06, Jan Beulich wrote:
> >
> > On 17.07.2020 15:59, Bertrand Marquis wrote:
> >>
> >>
> >>> On 17 Jul 2020, at 15:19, Jan Beulich wrote:
> >>>
> >>> On 17.07.2020 15:14, Bertrand Marquis wrote:
> On 17 Jul 2020, at 16:06, Jan Beulich wrote:
>
> On 17.07.2020 15:59, Bertrand Marquis wrote:
>>
>>
>>> On 17 Jul 2020, at 15:19, Jan Beulich wrote:
>>>
>>> On 17.07.2020 15:14, Bertrand Marquis wrote:
> On 17 Jul 2020, at 10:10, Jan Beulich wrote:
> On 16.07.2020 19:10, Rahul
On Fri, Jul 17, 2020 at 01:22:19PM +, Bertrand Marquis wrote:
>
>
> > On 17 Jul 2020, at 13:16, Roger Pau Monné wrote:
> >
> > I've wrapped the email to 80 columns in order to make it easier to
> > reply.
> >
> > Thanks for doing this, I think the design is good, I have some
> > questions
On 17.07.2020 15:59, Bertrand Marquis wrote:
>
>
>> On 17 Jul 2020, at 15:19, Jan Beulich wrote:
>>
>> On 17.07.2020 15:14, Bertrand Marquis wrote:
On 17 Jul 2020, at 10:10, Jan Beulich wrote:
On 16.07.2020 19:10, Rahul Singh wrote:
> # Emulated PCI device tree node in libxl:
> On 17 Jul 2020, at 15:49, Julien Grall wrote:
>
>
>
> On 17/07/2020 14:44, Bertrand Marquis wrote:
>>> On 17 Jul 2020, at 15:29, Julien Grall wrote:
>>>
>>>
>>>
>>> On 17/07/2020 14:22, Bertrand Marquis wrote:
>> # Emulated PCI device tree node in libxl:
>>
>> Libxl is
> On 17 Jul 2020, at 15:19, Jan Beulich wrote:
>
> On 17.07.2020 15:14, Bertrand Marquis wrote:
>>> On 17 Jul 2020, at 10:10, Jan Beulich wrote:
>>> On 16.07.2020 19:10, Rahul Singh wrote:
# Emulated PCI device tree node in libxl:
Libxl is creating a virtual PCI device tree
On 17/07/2020 14:44, Bertrand Marquis wrote:
On 17 Jul 2020, at 15:29, Julien Grall wrote:
On 17/07/2020 14:22, Bertrand Marquis wrote:
# Emulated PCI device tree node in libxl:
Libxl is creating a virtual PCI device tree node in the device tree
to enable the guest OS to discover the
> On 17 Jul 2020, at 15:29, Julien Grall wrote:
>
>
>
> On 17/07/2020 14:22, Bertrand Marquis wrote:
# Emulated PCI device tree node in libxl:
Libxl is creating a virtual PCI device tree node in the device tree
to enable the guest OS to discover the virtual PCI during
On 17/07/2020 14:22, Bertrand Marquis wrote:
# Emulated PCI device tree node in libxl:
Libxl is creating a virtual PCI device tree node in the device tree
to enable the guest OS to discover the virtual PCI during guest
boot. We introduced the new config option [vpci="pci_ecam"] for
guests.
> On 17 Jul 2020, at 9:47 am, Oleksandr Andrushchenko
> wrote:
>
>
> On 7/17/20 11:10 AM, Jan Beulich wrote:
>> On 16.07.2020 19:10, Rahul Singh wrote:
>>> # Discovering PCI devices:
>>>
>>> PCI-PCIe enumeration is a process of detecting devices connected to its
>>> host. It is the
> On 17 Jul 2020, at 13:41, Oleksandr Andrushchenko
> wrote:
>
>
> On 7/17/20 2:26 PM, Julien Grall wrote:
>>
>>
>> On 17/07/2020 08:41, Oleksandr Andrushchenko wrote:
> We need to come up with something similar for dom0less too. It could be
> exactly the same thing (a list of
> On 17 Jul 2020, at 13:16, Roger Pau Monné wrote:
>
> I've wrapped the email to 80 columns in order to make it easier to
> reply.
>
> Thanks for doing this, I think the design is good, I have some
> questions below so that I understand the full picture.
>
> On Thu, Jul 16, 2020 at
On 17.07.2020 15:14, Bertrand Marquis wrote:
>> On 17 Jul 2020, at 10:10, Jan Beulich wrote:
>> On 16.07.2020 19:10, Rahul Singh wrote:
>>> # Emulated PCI device tree node in libxl:
>>>
>>> Libxl is creating a virtual PCI device tree node in the device tree to
>>> enable the guest OS to discover
> On 17 Jul 2020, at 10:10, Jan Beulich wrote:
>
> On 16.07.2020 19:10, Rahul Singh wrote:
>> # Discovering PCI devices:
>>
>> PCI-PCIe enumeration is a process of detecting devices connected to its
>> host. It is the responsibility of the hardware domain or boot firmware to do
>> the PCI
Hi,
I will reply for Rahul until he gets his mail client fixed.
> On 17 Jul 2020, at 09:41, Oleksandr Andrushchenko
> wrote:
>
>
> On 7/17/20 9:53 AM, Bertrand Marquis wrote:
>>
>>> On 16 Jul 2020, at 22:51, Stefano Stabellini wrote:
>>>
>>> On Thu, 16 Jul 2020, Rahul Singh wrote:
On 17.07.2020 14:46, Rahul Singh wrote:
> Sorry for previous mail formatting issue. Replying again so that any comment
> history should not missed.
I'm sorry, but from a plain text view I cannot determine what parts
your replies were (in fact all nesting of prior replies is lost).
Please can you
On 7/17/20 2:26 PM, Julien Grall wrote:
>
>
> On 17/07/2020 08:41, Oleksandr Andrushchenko wrote:
We need to come up with something similar for dom0less too. It could be
exactly the same thing (a list of BDFs as strings as a device tree
property) or something else if we can come up
On 17/07/2020 08:41, Oleksandr Andrushchenko wrote:
We need to come up with something similar for dom0less too. It could be
exactly the same thing (a list of BDFs as strings as a device tree
property) or something else if we can come up with a better idea.
Fully agree.
Maybe a tree topology
I've wrapped the email to 80 columns in order to make it easier to
reply.
Thanks for doing this, I think the design is good, I have some
questions below so that I understand the full picture.
On Thu, Jul 16, 2020 at 05:10:05PM +, Rahul Singh wrote:
> Hello All,
>
> Following up on
On 7/17/20 11:10 AM, Jan Beulich wrote:
On 16.07.2020 19:10, Rahul Singh wrote:
# Discovering PCI devices:
PCI-PCIe enumeration is a process of detecting devices connected to its host.
It is the responsibility of the hardware domain or boot firmware to do the PCI
enumeration and configure
On 16.07.2020 19:10, Rahul Singh wrote:
> # Discovering PCI devices:
>
> PCI-PCIe enumeration is a process of detecting devices connected to its host.
> It is the responsibility of the hardware domain or boot firmware to do the
> PCI enumeration and configure the BAR, PCI capabilities, and
On 7/17/20 9:53 AM, Bertrand Marquis wrote:
>
>> On 16 Jul 2020, at 22:51, Stefano Stabellini wrote:
>>
>> On Thu, 16 Jul 2020, Rahul Singh wrote:
>>> Hello All,
>>>
>>> Following up on discussion on PCI Passthrough support on ARM that we had at
>>> the XEN summit, we are submitting a Review
> On 16 Jul 2020, at 22:51, Stefano Stabellini wrote:
>
> On Thu, 16 Jul 2020, Rahul Singh wrote:
>> Hello All,
>>
>> Following up on discussion on PCI Passthrough support on ARM that we had at
>> the XEN summit, we are submitting a Review For Comment and a design proposal
>> for PCI
On Thu, 16 Jul 2020, Rahul Singh wrote:
> Hello All,
>
> Following up on discussion on PCI Passthrough support on ARM that we had at
> the XEN summit, we are submitting a Review For Comment and a design proposal
> for PCI passthrough support on ARM. Feel free to give your feedback.
>
> The
Hello All,
Following up on discussion on PCI Passthrough support on ARM that we had at the
XEN summit, we are submitting a Review For Comment and a design proposal for
PCI passthrough support on ARM. Feel free to give your feedback.
The followings describe the high-level design proposal of the
47 matches
Mail list logo
