On Thu, 2012-03-08 at 22:57:30 +, Julian Pidancet wrote:
On Wed, Mar 7, 2012 at 7:04 PM, Guillem Jover guil...@hadrons.org wrote:
On Wed, 2012-03-07 at 17:54:57 +, Julian Pidancet wrote:
So according to the manual, it should be BP, not EBP.
The register being decreased should
Hi!
On Mon, 2012-03-05 at 17:49:08 +, Julian Pidancet wrote:
diff --git a/hw/xfree86/x86emu/ops.c b/hw/xfree86/x86emu/ops.c
index 5d3cac1..440b8dc 100644
--- a/hw/xfree86/x86emu/ops.c
+++ b/hw/xfree86/x86emu/ops.c
@@ -8787,11 +8795,16 @@ static void x86emuOp_enter(u8 X86EMU_UNUSED(op1))
On Wed, Mar 7, 2012 at 1:46 PM, Guillem Jover guil...@hadrons.org wrote:
Hi!
On Mon, 2012-03-05 at 17:49:08 +, Julian Pidancet wrote:
diff --git a/hw/xfree86/x86emu/ops.c b/hw/xfree86/x86emu/ops.c
index 5d3cac1..440b8dc 100644
--- a/hw/xfree86/x86emu/ops.c
+++ b/hw/xfree86/x86emu/ops.c
On Wed, 2012-03-07 at 17:54:57 +, Julian Pidancet wrote:
On Wed, Mar 7, 2012 at 1:46 PM, Guillem Jover guil...@hadrons.org wrote:
On Mon, 2012-03-05 at 17:49:08 +, Julian Pidancet wrote:
diff --git a/hw/xfree86/x86emu/ops.c b/hw/xfree86/x86emu/ops.c
index 5d3cac1..440b8dc 100644
On Wed, Mar 7, 2012 at 7:04 PM, Guillem Jover guil...@hadrons.org wrote:
On Wed, 2012-03-07 at 17:54:57 +, Julian Pidancet wrote:
On Wed, Mar 7, 2012 at 1:46 PM, Guillem Jover guil...@hadrons.org wrote:
On Mon, 2012-03-05 at 17:49:08 +, Julian Pidancet wrote:
diff --git
My last attempts to post to the xorg-devel mailing list failed. So retry now.
Some instructions are not emulated correctly by x86emu when they
are prefixed by the 0x66 opcode.
I've identified problems in the emulation of these intructions: ret,
enter, leave, iret and some forms of call.
Most of
