Subject: Re: [yocto] HEADSUP - CVE 2015-023 remote code execution in glibc
Alexandr,
On 01/28/2015 03:17 AM, Damian, Alexandru wrote:
More details
http://www.openwall.com/lists/oss-security/2015/01/27/9
redhat bug and patch
https://bugzilla.redhat.com/show_bug.cgi?id=CVE-2015-0235
Do we
Hello,
I have installed a SDK based on yocto 1.7 with
DEFAULTTUNE ?=cortexa8thf-neon set.
I have tried to compile the barebox bootloader with this
SDK like this:
source /opt/poky/1.7/environment-setup-cortexa8t2hf-vfp-neon-poky-linux-gnueabi
unset LDFLAGS
make am335x_defconfig
Also enabled a
Very many thanks Gary, it worked!
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*Att,Cleiton Bueno*
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i build yocto for beagleboard XM, while building tar --same-order error
shown.
i am using x86_64 processor and Opensuse 13.2.
please tell me to overcome to this problem.
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thanks and regards,
parthiban
+919790329795
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Hi Parthiban,
On Thursday 29 January 2015 18:05:11 Parthiban Kandasamy wrote:
i build yocto for beagleboard XM, while building tar --same-order error
shown.
i am using x86_64 processor and Opensuse 13.2.
please tell me to overcome to this problem.
This is a very sparse description of the
Hello,
I have build a custom recipe with
RDEPENDS_${PN} = python3 python3-multiprocessing python3-subprocess
python3-threading
Everything builds fine but at runtime I get
ImportError: No module named 'atexit'
I tried to add python3-lang package to RDEPENDS which seems to provide
From: Abhishek Paliwal abhishek.pali...@aricent.com
From: David Daney david.da...@cavium.com
Combined several changes:
Add workaround for chips with broken irqs.
Use High Level Controller when possible.
Retry more situations where arbitration is lost.
Clean up resource allocation code.
From: Abhishek Paliwal abhishek.pali...@aricent.com
From: David Daney david.da...@cavium.com
... to allow interaction with cvmx-twsi code.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Abhishek Paliwal abhishek.pali...@aricent.com
---
arch/mips/include/asm/octeon/octeon.h |
From: Abhishek Paliwal abhishek.pali...@aricent.com
From: David Daney david.da...@cavium.com
The addresses of the GPIO_BIT_CFG registers have a different layout on
cn78XX.
Define OF_GPIO_OPEN_DRAIN flag for Open Drain outputs.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by:
From: Abhishek Paliwal abhishek.pali...@aricent.com
From: David Daney david.da...@cavium.com
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Abhishek Paliwal abhishek.pali...@aricent.com
---
arch/mips/cavium-octeon/Makefile| 1 +
From: Abhishek Paliwal abhishek.pali...@aricent.com
From: David Daney david.da...@cavium.com
... in order to keep all SMP related code together.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Abhishek Paliwal abhishek.pali...@aricent.com
---
arch/mips/cavium-octeon/setup.c
From: Abhishek Paliwal abhishek.pali...@aricent.com
From: Aaron Williams aaron.willi...@cavium.com
Currently there is no easy way to map a device tree node to a memory
accessor function for devices like I2C EEPROMs. For example, the Vitesse
vsc848x 10G PHY driver needs to be able to use the I2C
From: Abhishek Paliwal abhishek.pali...@aricent.com
From: Aaron Williams aaron.willi...@cavium.com
The at24 module will now register its memory accessor functions with its
device tree entry so that other modules may call these functions based on
the device tree node.
Signed-off-by: Aaron
From: Abhishek Paliwal abhishek.pali...@aricent.com
From: David Daney david.da...@cavium.com
cn78XX has a different interrupt architecture, so we have to manage the
interrupts a little differently.
Signed-off-by: David Daney david.da...@cavium.com
Signed-off-by: Abhishek Paliwal
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