On 26 July 2010 20:28, David Garabana <[email protected]> wrote: > What's the meaning of sd_post_power_clock and sd_slow_ratio? > > I could try to change them also, but I don'n know if they would help with my > problem.
There is some documentation in glamo-mci.c: /* * Max SD clock rate * * held at /(3 + 1) due to concerns of 100R recommended series resistor * allows 16MHz @ 4-bit --> 8MBytes/sec raw * * you can override this on kernel commandline using * * glamo_mci.sd_max_clk=10000000 * * for example */ static int sd_max_clk = 50000000 / 3; module_param(sd_max_clk, int, 0644); /* * Slow SD clock rate * * you can override this on kernel commandline using * * glamo_mci.sd_slow_ratio=8 * * for example * * platform callback is used to decide effective clock rate, if not * defined then max is used, if defined and returns nonzero, rate is * divided by this factor */ static int sd_slow_ratio = 8; module_param(sd_slow_ratio, int, 0644); /* * Post-power SD clock rate * * you can override this on kernel commandline using * * glamo_mci.sd_post_power_clock=1000000 * * for example * * After changing power to card, clock is held at this rate until first bulk * transfer completes */ static int sd_post_power_clock = 1000000; module_param(sd_post_power_clock, int, 0644); _______________________________________________ Shr-devel mailing list [email protected] http://lists.shr-project.org/mailman/listinfo/shr-devel
