Matthew Sayler wrote:
>
> I remember back in '00 when Justin Georgeson wrote:
> > So what's the rule with this. I know I can use an i386 or and i686 RPM
> > on a Pentium II chip. But in general what are the rules for using ix86
> > RPMS on i(x+n)86 chips, n!=0?
>
> For n>0 you should not have any problems. Intel (and by extension
> AMD and friends) have been very careful about preserving backwards
> compatability. The only thing that you might run into problems
> (and I can't think of any examples) would be if you tried to
> run a 3dnow binary on an intel chip or a MMX (or SSE, whatever
> it's called) executable on a non-MMX clone.
>
> For n<0, there are occasional problems. Espeically for the i386
> and i486 ISA's, there are lots of instruction changes (relative
> to, say, a pentium). You can't run a i486 kernel on an i386,
> or a i686 kernel on an i486 because the kernel exploits features
> of these architectures.
>
> This is a bit rambling. Does this help?
yep, I should be able to run an ix86 RPM on an iy86 chip as long as x <=
y, cool. Thanks.
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