Hello everyone, First of all I'm not a fan of python so I don't know what I'm doing. But every year I try to use python for something and understand why it exist.
And I have read the decoder howto but my issue currently is the language and its patterns. I'm writing a protocol decoder for VS10xx(* chips and trying to find good examples to understand how things should be done. I should use an option to select the chip. The decoder is simple (my explanation may not) My input would be SPI and two extra optional logic signals (DREQ and XDCS). And I would like to do the annotations for spi input, which I assume is connected to SCI interface. The decode is on the simple side. 0x2Y byte to write register Y (0..f) and then 16 bit of data. or 0x3Y to read. Multiple write is another trick but I think it is on the easy side to implement. >From that data register bits should be annotated. The DREQ and XDCS are easy. Warn if XDCS falls while DREQ is down. Can I get XCS status info also from SPI decoder? as that would also be something to warn. And when XDCS is down just annotating "data" should be sufficient as spi isn't decoding because XCS is high. I'm targetting new mode where SDI and SCI have their own chip selects and data is annotated only on SCI interface. So the decoding is mostly simple lookup from 5*16*16 (chips*regs*bits) table and there are many common names. Now comes the tricky part. What kind of structure should I use to accessing the bit values so it is fast? And which decoder would be a good example to take a look these things? As I have no idea what is good python and I'm looking for the pattern to use. Best regards, Hannu Vuolasaho (* VLSI Solution VS1011, VS1103, VS1003, VS1053 and VS1063 Datasheet of VS1053: https://www.vlsi.fi/fileadmin/datasheets/vs1053.pdf _______________________________________________ sigrok-devel mailing list sigrok-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/sigrok-devel
