Ok I used exactly the same configuration but still doesn't works.
The output is below
run_job -run timing -ma -cfg configs -local UP.OoO flexus_test_app_v9
Setting up flexus_test_app_v9 (0:0): 000:000
/home/research/zhadji01/flexus-results/configs-UP.OoO-05Jul12-211523/flexus_test_app_v9/000_000
Image memory limited to 1 GB
Argument error: argument 1 (user-preload.simics) given to
'run-command-file' has the wrong type;
an existing file (in the Simics search path) expected.
SYNOPSIS: run-command-file file
Opening debug output file: debug.out
Opening debug output file: stats.out
Opening debug output file: trace.out
Successfully parsed debug configurations from debug.cfg
Initializing Flexus::ConfigurationManager...done
Initializing Flexus::ComponentManager...done
Entered init_local
Flexus (C) 2006-2010 The SimFlex Project
Eric Chung, Michael Ferdman, Brian Gold, Nikos Hardavellas, Jangwook Kim,
Ippokratis Pandis, Minglong Shao, Jared Smolens, Stephen Somogyi,
Evangelos Vlachos, Thomas Wenisch, Roland Wunderlich
Anastassia Ailamaki, Babak Falsafi and James C. Hoe.
Flexus Simics simulator - Built as UP.OoO v1.0
1 <startup.cpp:121> {0}- Initializing Flexus.
2 <ComponentManager.cpp:79> {0}- Instantiating system with a width
factor of: 1
3 <WhiteBoxImpl.cpp:416> {0}- Creating WhiteBox
4 <WhiteBoxImpl.cpp:99> {0}- symtable loaded
5 <uFetch.hpp:82> {0}- ufetch port InstructionFetchSeen is not wired
6 <uFetch.hpp:82> {0}- ufetch port ClockTickSeen is not wired
7 <v9Decoder.hpp:66> {0}- decoder port DispatchedInstructionOut is not wired
8 <uArch.hpp:121> {0}- uarch port StoreForwardingHitSeen is not wired
9 <Cache.hpp:92> {0}- L1d port FrontSideOut_I is not wired
10 <Cache.hpp:92> {0}- L1d port BackSideOut_Prefetch is not wired
11 <wiring.cpp:101> {0}- initializing Parameters...
Warning: The 'flexus-UP.OoO-v9-iface-gcc' module unexpectedly
defined the 'Flexus' class
Warning: The 'flexus-UP.OoO-v9-iface-gcc' module unexpectedly
defined the 'SimicsInterface' class
WARNING: There is no parameter named "-uarch:early_sgp"
WARNING: There is no parameter named "-uarch:track_parallel"
WARNING: There is no parameter named "-feeder:CMPwidth"
WARNING: There is no parameter named "-feeder:decouple_addr_spaces"
WARNING: There is no parameter named "-feeder:housekeeping_period"
WARNING: There is no parameter named "-feeder:ifetch"
WARNING: There is no parameter named "-feeder:simics_quantum"
WARNING: There is no parameter named "-feeder:stick"
WARNING: There is no parameter named "-feeder:whitebox_debug"
WARNING: There is no parameter named "-feeder:whitebox_debug_period"
WARNING: There is no parameter named "-bpwarm:cores"
WARNING: There is no parameter named "-L1d:size"
WARNING: There is no parameter named "-L1d:assoc"
WARNING: There is no parameter named "-L1d:block_scout"
WARNING: There is no parameter named "-L1d:clean_evict"
WARNING: There is no parameter named "-L1d:erb_size"
WARNING: There is no parameter named "-L1d:mt_width"
WARNING: There is no parameter named "-L1d:notify_reads"
WARNING: There is no parameter named "-L1d:notify_writes"
WARNING: There is no parameter named "-L1d:protocol"
WARNING: There is no parameter named "-L1d:rsize"
WARNING: There is no parameter named "-L1d:rt_assoc"
WARNING: There is no parameter named "-L1d:rt_repl"
WARNING: There is no parameter named "-L1d:rt_size"
WARNING: There is no parameter named "-L1d:skew_block_set"
WARNING: There is no parameter named "-L1d:std_array"
WARNING: There is no parameter named "-L1d:trace_tracker_on"
WARNING: There is no parameter named "-L1d:using_traces"
WARNING: There is no parameter named "-L1d:downgrade_lru"
WARNING: There is no parameter named "-L1d:snoop_lru"
WARNING: There is no parameter named "-L1i:assoc"
WARNING: There is no parameter named "-L1i:block_scout"
WARNING: There is no parameter named "-L1i:bsize"
WARNING: There is no parameter named "-L1i:clean_evict"
WARNING: There is no parameter named "-L1i:erb_size"
WARNING: There is no parameter named "-L1i:gzip_flexpoints"
WARNING: There is no parameter named "-L1i:mt_width"
WARNING: There is no parameter named "-L1i:notify_reads"
WARNING: There is no parameter named "-L1i:notify_writes"
WARNING: There is no parameter named "-L1i:protocol"
WARNING: There is no parameter named "-L1i:rsize"
WARNING: There is no parameter named "-L1i:rt_assoc"
WARNING: There is no parameter named "-L1i:rt_repl"
WARNING: There is no parameter named "-L1i:rt_size"
WARNING: There is no parameter named "-L1i:size"
WARNING: There is no parameter named "-L1i:skew_block_set"
WARNING: There is no parameter named "-L1i:std_array"
WARNING: There is no parameter named "-L1i:text_flexpoints"
WARNING: There is no parameter named "-L1i:trace_tracker_on"
WARNING: There is no parameter named "-L1i:using_traces"
WARNING: There is no parameter named "-L1i:downgrade_lru"
WARNING: There is no parameter named "-L1i:snoop_lru"
WARNING: There is no parameter named "-L2:CMPWidth"
WARNING: There is no parameter named "-L2:always_multicast"
WARNING: There is no parameter named "-L2:assoc"
WARNING: There is no parameter named "-L2:clean_evict"
WARNING: There is no parameter named "-L2:coherence_unit"
WARNING: There is no parameter named "-L2:directory_type"
WARNING: There is no parameter named "-L2:erb_size"
WARNING: There is no parameter named "-L2:no_latency"
WARNING: There is no parameter named "-L2:protocol"
WARNING: There is no parameter named "-L2:repl"
WARNING: There is no parameter named "-L2:rsize"
WARNING: There is no parameter named "-L2:rt_assoc"
WARNING: There is no parameter named "-L2:rt_repl"
WARNING: There is no parameter named "-L2:rt_size"
WARNING: There is no parameter named "-L2:seperate_id"
WARNING: There is no parameter named "-L2:size"
WARNING: There is no parameter named "-L2:std_array"
WARNING: There is no parameter named "-L2:trace_tracker_on"
WARNING: There is no parameter named "-memory:device-file"
WARNING: There is no parameter named "-memory:memory-system-file"
WARNING: There is no parameter named "-memory:interleaving"
WARNING: There is no parameter named "-memory:frequency"
WARNING: There is no parameter named "-memory:dyn_size"
WARNING: There is no parameter named "-memory:size"
WARNING: There is no parameter named "-memory:max_replies"
12 <flexus.cpp:385> {0}- Set region interval to : 50000
12 <flexus.cpp:385> {0}- Set region interval to : 50000
[cpu0 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable
cache line size.
13 <ComponentManager.cpp:94> {0}- Initalizing components...
13 <ComponentManager.cpp:94> {0}- Initalizing components...
14 <ComponentManager.cpp:98> {0}- Initalizing sys-white-box
14 <ComponentManager.cpp:98> {0}- Initalizing sys-white-box
15 <ComponentManager.cpp:98> {0}- Initalizing sys-fag
15 <ComponentManager.cpp:98> {0}- Initalizing sys-fag
16 <mai_api.cpp:279> {0}- Searching 1 cpus.
16 <mai_api.cpp:279> {0}- Searching 1 cpus.
17 <mai_api.cpp:283> {0}- Processor 0: cpu0 - CPU 0
17 <mai_api.cpp:283> {0}- Processor 0: cpu0 - CPU 0
18 <mai_api.cpp:305> {0}- Found CPU: '' - 0
18 <mai_api.cpp:305> {0}- Found CPU: '' - 0
19 <mai_api.cpp:325> {0}- Found 1 Flexus CPUs and 0 Client CPUs and
0 Besim CPUs in 0 VMs
19 <mai_api.cpp:325> {0}- Found 1 Flexus CPUs and 0 Client CPUs and
0 Besim CPUs in 0 VMs
20 <mai_api.cpp:428> {0}- Automatic organization of equal-size VMs
20 <mai_api.cpp:428> {0}- Automatic organization of equal-size VMs
21 <mai_api.cpp:435> {0}- Square topology of VMs: 1x1
21 <mai_api.cpp:435> {0}- Square topology of VMs: 1x1
22 <mai_api.cpp:439> {0}- Square VM: 1x1
22 <mai_api.cpp:439> {0}- Square VM: 1x1
23 <mai_api.cpp:467> {0}- VMS per row = 1, CPVM = 1, GridOfVM =
1*1, NumRows = 1
23 <mai_api.cpp:467> {0}- VMS per row = 1, CPVM = 1, GridOfVM =
1*1, NumRows = 1
24 <mai_api.cpp:527> {0}- theProcMap[0] = (0, 0) (abs_index = 0)
24 <mai_api.cpp:527> {0}- theProcMap[0] = (0, 0) (abs_index = 0)
25 <mai_api.cpp:541> {0}- Finished creating Processor Mapper.
25 <mai_api.cpp:541> {0}- Finished creating Processor Mapper.
26 <FetchAddressGenerateImpl.cpp:88> {0}- sys-fag Thread[0.0]
connected to cpu0 Initial PC: v:0000119f0
26 <FetchAddressGenerateImpl.cpp:88> {0}- Thread[0.0] connected to
cpu0 Initial PC: v:0000119f0
27 <ComponentManager.cpp:98> {0}- Initalizing sys-ufetch
27 <ComponentManager.cpp:98> {0}- Initalizing sys-ufetch
28 <ComponentManager.cpp:98> {0}- Initalizing sys-combiner
28 <ComponentManager.cpp:98> {0}- Initalizing sys-combiner
29 <ComponentManager.cpp:98> {0}- Initalizing sys-decoder
29 <ComponentManager.cpp:98> {0}- Initalizing sys-decoder
30 <ComponentManager.cpp:98> {0}- Initalizing sys-uarch
30 <ComponentManager.cpp:98> {0}- Initalizing sys-uarch
31 <microArch.cpp:202> {0}- sys-uarch connected to cpu0
31 <microArch.cpp:202> {0}- sys-uarch connected to cpu0
32 <ComponentManager.cpp:98> {0}- Initalizing sys-L1d
32 <ComponentManager.cpp:98> {0}- Initalizing sys-L1d
33 <ComponentManager.cpp:98> {0}- Initalizing sys-L2
33 <ComponentManager.cpp:98> {0}- Initalizing sys-L2
34 <CMPCacheImpl.cpp:91> {0}- GroupInterleaving = 4096
34 <CMPCacheImpl.cpp:91> {0}- GroupInterleaving = 4096
35 <NonInclusiveMESIPolicy.cpp:98> {0}- GI = 4096
35 <NonInclusiveMESIPolicy.cpp:98> {0}- GI = 4096
36 <NonInclusiveMESIPolicy.cpp:80> {0}- GI = 4096
36 <NonInclusiveMESIPolicy.cpp:80> {0}- GI = 4096
37 <StdArray.hpp:578> {0}- theGroupInterleaving = 4096
37 <StdArray.hpp:578> {0}- theGroupInterleaving = 4096
38 <StdArray.hpp:687> {0}- blockOffsetBits = 6, indexBits = 11,
bankBits = 0, bankInterleavingBits = 6, groupBits = 0,
groupInterleavingBits = 12, lowBits = 0, midBits = 6, highBits = 5,
setLowMask = 0, setMidMask = 3f, setHighMask = 7c0, setLowShift =
6, setMidShift = 6, setHighShift = 6, theBankMask = 0, theBankShift
= 6, theGroupMask = 0, theGroupShift = 12
38 <StdArray.hpp:687> {0}- blockOffsetBits = 6, indexBits = 11,
bankBits = 0, bankInterleavingBits = 6, groupBits = 0,
groupInterleavingBits = 12, lowBits = 0, midBits = 6, highBits = 5,
setLowMask = 0, setMidMask = 3f, setHighMask = 7c0, setLowShift =
6, setMidShift = 6, setHighShift = 6, theBankMask = 0, theBankShift
= 6, theGroupMask = 0, theGroupShift = 12
39 <AbstractCacheController.hpp:72> {0}- sys-L2: created
AbstractCacheController 'sys-L2'
39 <AbstractCacheController.hpp:72> {0}- sys-L2: created
AbstractCacheController 'sys-L2'
40 <ComponentManager.cpp:98> {0}- Initalizing sys-memory
40 <ComponentManager.cpp:98> {0}- Initalizing sys-memory
41 <ComponentManager.cpp:98> {0}- Initalizing 00-nic
41 <ComponentManager.cpp:98> {0}- Initalizing 00-nic
42 <ComponentManager.cpp:98> {0}- Initalizing 01-nic
42 <ComponentManager.cpp:98> {0}- Initalizing 01-nic
43 <ComponentManager.cpp:98> {0}- Initalizing 02-nic
43 <ComponentManager.cpp:98> {0}- Initalizing 02-nic
44 <ComponentManager.cpp:98> {0}- Initalizing sys-network
44 <ComponentManager.cpp:98> {0}- Initalizing sys-network
Attaching node 0 to switch 0:0
Attaching node 1 to switch 0:1
Attaching node 2 to switch 0:2
WARNING: switch 0 port 3 left unused (may be safe)
WARNING: switch 0 port 4 left unused (may be safe)
WARNING: switch 0 port 5 left unused (may be safe)
WARNING: switch 0 port 6 left unused (may be safe)
45 <ComponentManager.cpp:98> {0}- Initalizing sys-memory-map
45 <ComponentManager.cpp:98> {0}- Initalizing sys-memory-map
46 <MemoryMapImpl.cpp:326> {0}- Page map file page_map.out was not found.
46 <MemoryMapImpl.cpp:326> {0}- Page map file page_map.out was not found.
47 <ComponentManager.cpp:98> {0}- Initalizing sys-magic-break
47 <ComponentManager.cpp:98> {0}- Initalizing sys-magic-break
48 <ComponentManager.cpp:98> {0}- Initalizing sys-net-mapper
48 <ComponentManager.cpp:98> {0}- Initalizing sys-net-mapper
49 <SplitDestinationMapperImpl.cpp:139> {0}- sys-net-mapper
Creating SplitDestinationMapper with 1 cores, 1 directories, and 1
memory controllers.
49 <SplitDestinationMapperImpl.cpp:139> {0}- Creating
SplitDestinationMapper with 1 cores, 1 directories, and 1 memory
controllers.
*** ASSERTION ERROR:
in /mp/simics-3.0/src/core/common/event.c:763
Simics core: 1406 Tue Feb 19 19:05:46 2008
Please report this.
Simics will now self-signal an abort.
Abort (SIGABRT) in main thread
Crash stack trace:
#0 0x0000003bfdc0eaad <unknown>
./go.sh: line 4: 964 Segmentation fault
/home/research/zhadji01/virtutech/simics-3.0.31/scripts/start-simics
-no-copyright -x start.simics -no-win -ma -batch-mode -q
Quoting Mohammad Alisafaee <[email protected]>:
I tried to reproduce the error (with a different workload tough)
but everything worked well. At first, let's make sure that the
configuration is fine and then we will check the test_app. Use the
configuration which is located in the "configs" directory (copy
the whole directory not only the user-postload.simics). You need
to edit the "user-postload.simics" file and change the parameters
to have one core. Run the workload with this new configuration and
see if it works or not.
Mohammad
P.S.
The user-postload.simics should look like this after modification:
# Do not change the order of lines in this file
# The number of cores
$NUMCPUS = 1
# Select Cortex A15- or A8-like cores
#run-command-file "arm-cortex-a8.simics"
run-command-file "arm-cortex-a15.simics"
# For timing, you must use an appropriate netwrok
# according to the number of core
flexus.set "-network:topology-file"
"1x3-mesh.topology" # 1-core
#flexus.set "-network:topology-file"
"2x3-mesh.topology" # 2-core
#flexus.set "-network:topology-file"
"4x3-mesh.topology" # 4-core
#flexus.set "-network:topology-file"
"8x3-mesh.topology" # 8-core
#flexus.set "-network:topology-file"
"16x3-mesh.topology" # 16-core
#flexus.set "-network:topology-file"
"32x3-mesh.topology" # 32-core
#flexus.set "-network:topology-file"
"64x3-mesh.topology" # 64-core
# Two parameters define the number of MCs and their
# location:
# "-net-mapper:MemControllers"
# "-net-mapper:MemLocation"
# Change the simulator wiring file to have the same
# number of memory controllers in the simulator.
# The following table shows suggested values for these
# parameters based on the number of cores in the system:
# +---------+-------+-------------------------+
# |NUM Cores|NUM MCs|MC Location |
# +---------+-------+-------------------------+
# | 1 | 1 | "0" |
# | 2 | 1 | "0" |
# | 4 | 1 | "0" |
# | 8 | 2 | "0,7" |
# | 16 | 4 | "1,7,8,14" |
# | 32 | 4 | "8,11,20,23" |
# | 64 | 8 | "2,5,16,23,40,47,58,61" |
# +---------+-------+-------------------------+
flexus.set "-net-mapper:MemControllers" "1"
flexus.set "-net-mapper:MemLocation" "0"
On Jul 5, 2012, at 10:55 AM, <[email protected]>
wrote:
Hello Mohammad,
Thanks for the reply. I did as you said. I'm using flexus-4.1
release and the configuration can be found in
flexus_test_app/timing_v9. I added to the user-postload.simics
the three parameters that were missing. I run the command
"run_job -run timing -cfg timing_v9 -local -ma UP.OoO
flexus_test_app_v9" but the simulation stopped again at a further
point. Below is the output.
1 <startup.cpp:121> {0}- Initializing Flexus.
2 <ComponentManager.cpp:79> {0}- Instantiating system with a
width factor of: 1
3 <WhiteBoxImpl.cpp:416> {0}- Creating WhiteBox
4 <WhiteBoxImpl.cpp:99> {0}- symtable loaded
5 <uFetch.hpp:82> {0}- ufetch port InstructionFetchSeen is not wired
6 <uFetch.hpp:82> {0}- ufetch port ClockTickSeen is not wired
7 <v9Decoder.hpp:66> {0}- decoder port DispatchedInstructionOut
is not wired
8 <uArch.hpp:121> {0}- uarch port StoreForwardingHitSeen is not wired
9 <Cache.hpp:92> {0}- L1d port FrontSideOut_I is not wired
10 <Cache.hpp:92> {0}- L1d port BackSideOut_Prefetch is not wired
11 <wiring.cpp:101> {0}- initializing Parameters...
Warning: The 'flexus-UP.OoO-v9-iface-gcc' module unexpectedly
defined the 'Flexus' class
Warning: The 'flexus-UP.OoO-v9-iface-gcc' module unexpectedly
defined the 'SimicsInterface' class
WARNING: There is no parameter named "-uarch:early_sgp"
WARNING: There is no parameter named "-uarch:track_parallel"
12 <configuration.hpp:189> {0}- Bad Lexical Cast attempting to
set dynamic parameter.
12 <configuration.hpp:189> {0}- Bad Lexical Cast attempting to
set dynamic parameter.
WARNING: Unable to set parameter CacheLevel to eL1
13 <configuration.hpp:189> {0}- Bad Lexical Cast attempting to
set dynamic parameter.
13 <configuration.hpp:189> {0}- Bad Lexical Cast attempting to
set dynamic parameter.
WARNING: Unable to set parameter CacheLevel to eL2
14 <flexus.cpp:385> {0}- Set region interval to : 50000
14 <flexus.cpp:385> {0}- Set region interval to : 50000
[cpu0 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable
cache line size.
15 <ComponentManager.cpp:94> {0}- Initalizing components...
15 <ComponentManager.cpp:94> {0}- Initalizing components...
16 <ComponentManager.cpp:98> {0}- Initalizing sys-white-box
16 <ComponentManager.cpp:98> {0}- Initalizing sys-white-box
17 <ComponentManager.cpp:98> {0}- Initalizing sys-fag
17 <ComponentManager.cpp:98> {0}- Initalizing sys-fag
18 <mai_api.cpp:279> {0}- Searching 1 cpus.
18 <mai_api.cpp:279> {0}- Searching 1 cpus.
19 <mai_api.cpp:283> {0}- Processor 0: cpu0 - CPU 0
19 <mai_api.cpp:283> {0}- Processor 0: cpu0 - CPU 0
20 <mai_api.cpp:305> {0}- Found CPU: '' - 0
20 <mai_api.cpp:305> {0}- Found CPU: '' - 0
21 <mai_api.cpp:325> {0}- Found 1 Flexus CPUs and 0 Client CPUs
and 0 Besim CPUs in 0 VMs
21 <mai_api.cpp:325> {0}- Found 1 Flexus CPUs and 0 Client CPUs
and 0 Besim CPUs in 0 VMs
22 <mai_api.cpp:428> {0}- Automatic organization of equal-size VMs
22 <mai_api.cpp:428> {0}- Automatic organization of equal-size VMs
23 <mai_api.cpp:435> {0}- Square topology of VMs: 1x1
23 <mai_api.cpp:435> {0}- Square topology of VMs: 1x1
24 <mai_api.cpp:439> {0}- Square VM: 1x1
24 <mai_api.cpp:439> {0}- Square VM: 1x1
25 <mai_api.cpp:467> {0}- VMS per row = 1, CPVM = 1, GridOfVM =
1*1, NumRows = 1
25 <mai_api.cpp:467> {0}- VMS per row = 1, CPVM = 1, GridOfVM =
1*1, NumRows = 1
26 <mai_api.cpp:527> {0}- theProcMap[0] = (0, 0) (abs_index = 0)
26 <mai_api.cpp:527> {0}- theProcMap[0] = (0, 0) (abs_index = 0)
27 <mai_api.cpp:541> {0}- Finished creating Processor Mapper.
27 <mai_api.cpp:541> {0}- Finished creating Processor Mapper.
28 <FetchAddressGenerateImpl.cpp:88> {0}- sys-fag Thread[0.0]
connected to cpu0 Initial PC: v:0000119f0
28 <FetchAddressGenerateImpl.cpp:88> {0}- Thread[0.0] connected
to cpu0 Initial PC: v:0000119f0
29 <ComponentManager.cpp:98> {0}- Initalizing sys-ufetch
29 <ComponentManager.cpp:98> {0}- Initalizing sys-ufetch
30 <ComponentManager.cpp:98> {0}- Initalizing sys-combiner
30 <ComponentManager.cpp:98> {0}- Initalizing sys-combiner
31 <ComponentManager.cpp:98> {0}- Initalizing sys-decoder
31 <ComponentManager.cpp:98> {0}- Initalizing sys-decoder
32 <ComponentManager.cpp:98> {0}- Initalizing sys-uarch
32 <ComponentManager.cpp:98> {0}- Initalizing sys-uarch
33 <microArch.cpp:202> {0}- sys-uarch connected to cpu0
33 <microArch.cpp:202> {0}- sys-uarch connected to cpu0
34 <ComponentManager.cpp:98> {0}- Initalizing sys-L1d
34 <ComponentManager.cpp:98> {0}- Initalizing sys-L1d
35 <ComponentManager.cpp:98> {0}- Initalizing sys-L2
35 <ComponentManager.cpp:98> {0}- Initalizing sys-L2
36 <CMPCacheImpl.cpp:91> {0}- GroupInterleaving = 1024
36 <CMPCacheImpl.cpp:91> {0}- GroupInterleaving = 1024
37 <NonInclusiveMESIPolicy.cpp:98> {0}- GI = 1024
37 <NonInclusiveMESIPolicy.cpp:98> {0}- GI = 1024
38 <NonInclusiveMESIPolicy.cpp:80> {0}- GI = 1024
38 <NonInclusiveMESIPolicy.cpp:80> {0}- GI = 1024
39 <StdArray.hpp:578> {0}- theGroupInterleaving = 1024
39 <StdArray.hpp:578> {0}- theGroupInterleaving = 1024
40 <StdArray.hpp:687> {0}- blockOffsetBits = 6, indexBits = 13,
bankBits = 0, bankInterleavingBits = 6, groupBits = 0,
groupInterleavingBits = 10, lowBits = 0, midBits = 4, highBits =
9, setLowMask = 0, setMidMask = f, setHighMask = 1ff0,
setLowShift = 6, setMidShift = 6, setHighShift = 6, theBankMask =
0, theBankShift = 6, theGroupMask = 0, theGroupShift = 10
40 <StdArray.hpp:687> {0}- blockOffsetBits = 6, indexBits = 13,
bankBits = 0, bankInterleavingBits = 6, groupBits = 0,
groupInterleavingBits = 10, lowBits = 0, midBits = 4, highBits =
9, setLowMask = 0, setMidMask = f, setHighMask = 1ff0,
setLowShift = 6, setMidShift = 6, setHighShift = 6, theBankMask =
0, theBankShift = 6, theGroupMask = 0, theGroupShift = 10
41 <AbstractCacheController.hpp:72> {0}- sys-L2: created
AbstractCacheController 'sys-L2'
41 <AbstractCacheController.hpp:72> {0}- sys-L2: created
AbstractCacheController 'sys-L2'
42 <ComponentManager.cpp:98> {0}- Initalizing sys-memory
42 <ComponentManager.cpp:98> {0}- Initalizing sys-memory
43 <ComponentManager.cpp:98> {0}- Initalizing 00-nic
43 <ComponentManager.cpp:98> {0}- Initalizing 00-nic
44 <ComponentManager.cpp:98> {0}- Initalizing 01-nic
44 <ComponentManager.cpp:98> {0}- Initalizing 01-nic
45 <ComponentManager.cpp:98> {0}- Initalizing 02-nic
45 <ComponentManager.cpp:98> {0}- Initalizing 02-nic
46 <ComponentManager.cpp:98> {0}- Initalizing sys-network
46 <ComponentManager.cpp:98> {0}- Initalizing sys-network
Attaching node 0 to switch 0:0
Attaching node 1 to switch 0:1
Attaching node 2 to switch 0:2
Attaching switch 0:5 to switch 0:3
Attaching switch 0:6 to switch 0:4
47 <ComponentManager.cpp:98> {0}- Initalizing sys-memory-map
47 <ComponentManager.cpp:98> {0}- Initalizing sys-memory-map
48 <MemoryMapImpl.cpp:326> {0}- Page map file page_map.out was not found.
48 <MemoryMapImpl.cpp:326> {0}- Page map file page_map.out was not found.
49 <ComponentManager.cpp:98> {0}- Initalizing sys-magic-break
49 <ComponentManager.cpp:98> {0}- Initalizing sys-magic-break
50 <ComponentManager.cpp:98> {0}- Initalizing sys-net-mapper
50 <ComponentManager.cpp:98> {0}- Initalizing sys-net-mapper
51 <SplitDestinationMapperImpl.cpp:139> {0}- sys-net-mapper
Creating SplitDestinationMapper with 1 cores, 1 directories, and
1 memory controllers.
51 <SplitDestinationMapperImpl.cpp:139> {0}- Creating
SplitDestinationMapper with 1 cores, 1 directories, and 1 memory
controllers.
*** ASSERTION ERROR:
in /mp/simics-3.0/src/core/common/event.c:763
Simics core: 1406 Tue Feb 19 19:05:46 2008
Please report this.
Simics will now self-signal an abort.
Abort (SIGABRT) in main thread
Crash stack trace:
#0 0x0000003b5c80eaad <unknown>
thanks - Zacharias
Quoting Mohammad Alisafaee <[email protected]>:
Hello,
The assertion fails because these parameters are not initialized
in the configuration files: -L1d:evict_writable_has_data,
-L2:controller, and -net-mapper:Banks. If you are using your own
configuration files, set proper values for these parameters
(e.g. "0", "Default", and "1" for UP). If you are using
configurations which are provided in a flexus release, please
tell me the release version and the full run_job command you are
using so that I can check what's going on.
Regards,
Mohammad
On Jul 4, 2012, at 4:32 PM,
<[email protected]<mailto:[email protected]>>
<[email protected]<mailto:[email protected]>> wrote:
Hi,
I'm following the 2010 getting started guide and I'm at the
point of running the flexus-test-app. I managed to create
flex-points but when I'm running the sampled timing simulation I
get an Abort (SIGABRT) in main thread error and the simulation
stops. Below is the full output.
Any hints of what causes the error?
thanks - Zacharias Hadjilambrou (University of Cyprus)
Flexus (C) 2006-2010 The SimFlex Project
Eric Chung, Michael Ferdman, Brian Gold, Nikos Hardavellas, Jangwook Kim,
Ippokratis Pandis, Minglong Shao, Jared Smolens, Stephen Somogyi,
Evangelos Vlachos, Thomas Wenisch, Roland Wunderlich
Anastassia Ailamaki, Babak Falsafi and James C. Hoe.
Flexus Simics simulator - Built as UP.OoO v1.0
1 <startup.cpp:121> {0}- Initializing Flexus.
2 <ComponentManager.cpp:79> {0}- Instantiating system with a
width factor of: 1
3 <WhiteBoxImpl.cpp:416> {0}- Creating WhiteBox
4 <WhiteBoxImpl.cpp:99> {0}- symtable loaded
5 <uFetch.hpp:82> {0}- ufetch port InstructionFetchSeen is not wired
6 <uFetch.hpp:82> {0}- ufetch port ClockTickSeen is not wired
7 <v9Decoder.hpp:66> {0}- decoder port DispatchedInstructionOut
is not wired
8 <uArch.hpp:121> {0}- uarch port StoreForwardingHitSeen is not wired
9 <Cache.hpp:92> {0}- L1d port FrontSideOut_I is not wired
10 <Cache.hpp:92> {0}- L1d port BackSideOut_Prefetch is not wired
11 <wiring.cpp:101> {0}- initializing Parameters...
Warning: The 'flexus-UP.OoO-v9-iface-gcc' module unexpectedly
defined the 'Flexus' class
Warning: The 'flexus-UP.OoO-v9-iface-gcc' module unexpectedly
defined the 'SimicsInterface' class
WARNING: There is no parameter named "-uarch:early_sgp"
WARNING: There is no parameter named "-uarch:track_parallel"
12 <configuration.hpp:189> {0}- Bad Lexical Cast attempting to
set dynamic parameter.
12 <configuration.hpp:189> {0}- Bad Lexical Cast attempting to
set dynamic parameter.
WARNING: Unable to set parameter CacheLevel to eL1
13 <configuration.hpp:189> {0}- Bad Lexical Cast attempting to
set dynamic parameter.
13 <configuration.hpp:189> {0}- Bad Lexical Cast attempting to
set dynamic parameter.
WARNING: Unable to set parameter CacheLevel to eL2
14 <flexus.cpp:385> {0}- Set region interval to : 50000
14 <flexus.cpp:385> {0}- Set region interval to : 50000
[cpu0 info] Note that on this cpu, instruction-fetch-trace is
implemented using instruction-cache-access-trace with a suitable
cache line size.
15 <flexus.cpp:532> {0}- Loading Flexus state from subdirectory
flexus_state_in
15 <flexus.cpp:532> {0}- Loading Flexus state from subdirectory
flexus_state_in
16 <ConfigurationManager.cpp:103> {0}- WARNING:
-L1d:evict_writable_has_data (EvictWritableHasData) was not set
in initializeParameters(), from the command line, or from Simics.
16 <ConfigurationManager.cpp:103> {0}- WARNING:
-L1d:evict_writable_has_data (EvictWritableHasData) was not set
in initializeParameters(), from the command line, or from Simics.
17 <ConfigurationManager.cpp:103> {0}- WARNING: -L2:controller
(ControllerType) was not set in initializeParameters(), from
the command line, or from Simics.
17 <ConfigurationManager.cpp:103> {0}- WARNING: -L2:controller
(ControllerType) was not set in initializeParameters(), from
the command line, or from Simics.
18 <ConfigurationManager.cpp:103> {0}- WARNING:
-net-mapper:Banks (Banks) was not set in
initializeParameters(), from the command line, or from Simics.
18 <ConfigurationManager.cpp:103> {0}- WARNING:
-net-mapper:Banks (Banks) was not set in
initializeParameters(), from the command line, or from Simics.
19 <ConfigurationManager.cpp:109> {0}- <undefined> Assertion
failed: ((!(false))) : ERROR: Not all parameters were
initialized, and initalizeParameters() indicates that they
should be.
Abort (SIGABRT) in main thread
Crash stack trace:
#0 0x0000003b5b830285 <unknown>
#1 0x00002b9db6c56590 <unknown>
#2 0x00002b9db6c56590 <unknown>
#3 0x00002b9db6c56590 <unknown>
#4 0x00002b9db6c56590 <unknown>
#5 0x00002b9db6c56590 <unknown>
#6 0x00002b9db6c56590 <unknown>
#7 0x00002b9db6c56590 <unknown>
#8 0x00002b9db6c56590 <unknown>
#9 0x00002b9db6c56590 <unknown>
#10 0x00002b9db6c56590 <unknown>
#11 0x00002b9db6c56590 <unknown>
#12 0x00002b9db6c56590 <unknown>
#13 0x00002b9db6c56590 <unknown>
#14 0x00002b9db6c56590 <unknown>
#15 0x00002b9db6c56590 <unknown>
#16 0x00002b9db6c56590 <unknown>
#17 0x00002b9db6c56590 <unknown>
#18 0x00002b9db6c56590 <unknown>
#19 0x00002b9db6c56590 <unknown>
#20 0x00002b9db6c56590 <unknown>
#21 0x00002b9db6c56590 <unknown>
#22 0x00002b9db6c56590 <unknown>
#23 0x00002b9db6c56590 <unknown>
#24 0x00002b9db6c56590 <unknown>
#25 0x00002b9db6c56590 <unknown>
#26 0x00002b9db6c56590 <unknown>
#27 0x00002b9db6c56590 <unknown>
#28 0x00002b9db6c56590 <unknown>
#29 0x00002b9db6c56590 <unknown>
#30 0x00002b9db6c56590 <unknown>
#31 0x00002b9db6c56590 <unknown>
#32 0x00002b9db6c56590 <unknown>
#33 0x00002b9db6c56590 <unknown>
#34 0x00002b9db6c56590 <unknown>
#35 0x00002b9db6c56590 <unknown>
#36 0x00002b9db6c56590 <unknown>
#37 0x00002b9db6c56590 <unknown>
#38 0x00002b9db6c56590 <unknown>
#39 0x00002b9db6c56590 <unknown>
#40 0x00002b9db6c56590 <unknown>
#41 0x00002b9db6c56590 <unknown>
#42 0x00002b9db6c56590 <unknown>
#43 0x00002b9db6c56590 <unknown>
#44 0x00002b9db6c56590 <unknown>
#45 0x00002b9db6c56590 <unknown>
#46 0x00002b9db6c56590 <unknown>
#47 0x00002b9db6c56590 <unknown>
#48 0x00002b9db6c56590 <unknown>
#49 0x00002b9db6c56590 <unknown>
#50 0x00002b9db6c56590 <unknown>
#51 0x00002b9db6c56590 <unknown>
#52 0x00002b9db6c56590 <unknown>
#53 0x00002b9db6c56590 <unknown>
#54 0x00002b9db6c56590 <unknown>
#55 0x00002b9db6c56590 <unknown>
#56 0x00002b9db6c56590 <unknown>
#57 0x00002b9db6c56590 <unknown>
#58 0x00002b9db6c56590 <unknown>
#59 0x00002b9db6c56590 <unknown>
#60 0x00002b9db6c56590 <unknown>
#61 0x00002b9db6c56590 <unknown>
#62 0x00002b9db6c56590 <unknown>
#63 0x00002b9db6c56590 <unknown>
#64 0x00002b9db6c56590 <unknown>
#65 0x00002b9db6c56590 <unknown>
#66 0x00002b9db6c56590 <unknown>
#67 0x00002b9db6c56590 <unknown>
#68 0x00002b9db6c56590 <unknown>
#69 0x00002b9db6c56590 <unknown>
#70 0x00002b9db6c56590 <unknown>
#71 0x00002b9db6c56590 <unknown>
#72 0x00002b9db6c56590 <unknown>
#73 0x00002b9db6c56590 <unknown>
#74 0x00002b9db6c56590 <unknown>
#75 0x00002b9db6c56590 <unknown>
#76 0x00002b9db6c56590 <unknown>
#77 0x00002b9db6c56590 <unknown>
#78 0x00002b9db6c56590 <unknown>
#79 0x00002b9db6c56590 <unknown>
#80 0x00002b9db6c56590 <unknown>
#81 0x00002b9db6c56590 <unknown>
#82 0x00002b9db6c56590 <unknown>
#83 0x00002b9db6c56590 <unknown>
#84 0x00002b9db6c56590 <unknown>
#85 0x00002b9db6c56590 <unknown>
#86 0x00002b9db6c56590 <unknown>
#87 0x00002b9db6c56590 <unknown>
#88 0x00002b9db6c56590 <unknown>
#89 0x00002b9db6c56590 <unknown>
#90 0x00002b9db6c56590 <unknown>
#91 0x00002b9db6c56590 <unknown>
#92 0x00002b9db6c56590 <unknown>
#93 0x00002b9db6c56590 <unknown>
#94 0x00002b9db6c56590 <unknown>
#95 0x00002b9db6c56590 <unknown>
#96 0x00002b9db6c56590 <unknown>
#97 0x00002b9db6c56590 <unknown>
#98 0x00002b9db6c56590 <unknown>
#99 0x00002b9db6c56590 <unknown>
#100 0x00002b9db6c56590 <unknown>
#101 0x00002b9db6c56590 <unknown>
#102 0x00002b9db6c56590 <unknown>
The simulation state has been corrupted. Simulation cannot continue.
Please restart Simics.
