Hi Jason,

I have finally had a chance to figure out this issue; sorry for the delay.

It turns out that the default configuration of the memory hierarchy in 
TraceCMPFlex and CMPFlex.OoO do not match.  TraceCMPFlex is set to 
generate 2-way associative L1 I caches, while CMPFlex.OoO is configured to 
expect 4-way associativity by default.

The easiest fix for this is to change the default in the CMPFlex.OoO 
wiring file.

In simulators/wiring/CMPFlex.OoO/wiring.cpp change:

     theuFetchCfg.Associativity.initialize(4);

to:

     theuFetchCfg.Associativity.initialize(2);

You can also configure this parameter at run time by modifying the OoO 
configuration.  In flexus-test-app/config/OoO/configuration.simics, add:

   flexus.set "-ufetch:associativity" "2"


Best Regards,
-Tom Wenisch
Computer Architecture Lab
Carnegie Mellon University

On Thu, 13 Jul 2006, Jason Zebchuk wrote:

> Hi,
>
> I followed the new Getting Started Guide through the timing experiments with 
> the sampled simulation using the DSMFlex.OoO simulator and everything worked 
> fine.  Now, I'd like to try the same thing with the CMPFlex.OoO simulator 
> instead, and I was wondering what changes I'd have to make.
>
> I tried running:
>
> ./create-initial-flexpoint TraceCMPFlex
> ./create-flexpoints TraceCMPFlex
> ./run-timing-jobs 0 26 -ma -cfg OoO CMPFlex.OoO
>
> but that gives the following errors:
>
> 16 <uFetchImpl.cpp:123> {0}- Loading state: flex_state_in/sys-L1i for ufetch 
> order L1i cache
> 17 <uFetchImpl.cpp:167> {0}- Expected '<' when loading checkpoint
> 18 <uFetchImpl.cpp:132> {0}- Error loading checkpoint state from file: 
> flex_state_in/sys-L1i.  Make sure your checkpoints match your current cache 
> configuration.
> 19 <uFetchImpl.cpp:133> (<undefined>[<undefined>]) {0}- Assertion failed: 
> ((!(false))) : <undefined>
>
>
> Do you have any suggestions as to what I need to change?
>
>
> Thanks,
>
> Jason
>
>
>
>
>
> Thomas Wenisch wrote:
>
>> 
>> The SimFlex project is pleased to annonce that Flexus 2.1.0 has been 
>> released and is available on the SimFlex web page.
>>     http://www.ece.cmu.edu/~simflex
>> 
>> This release resolves the long-standing compatability problems between
>> Flexus, Simics, and Fedora Core linux releases.  We now support Fedora Core 
>> 4 and 5.
>> 
>> Second, this release contains a completely revamped Getting Started Guide 
>> and sample application.  The new Guide walks the reader through a timing 
>> experiment with Flexus and includes scripts to automate the process of 
>> running a sampled simulation and aggregating the results.
>> 
>> Please report any difficulties with the new release to the mailing list.
>> 
>> Here are the notes from the version history:
>> 
>> Flexus 2.1.0 6/15/2006
>>    Release Manager: Tom Wenisch
>>    - New Getting Started Guide and flexus-test-app
>>    - Support for Fedora Core linux distributions
>>    - Support for emulating in-order superscalar and multithreading with
>>      OoO core
>>    - More detailed cache controller timing model
>> 
>> Regards,
>> -Tom Wenisch
>> Computer Architecture Lab
>> Carnegie Mellon University
>> 
>> 
>> _______________________________________________
>> SimFlex mailing list
>> [email protected]
>> https://sos.ece.cmu.edu/mailman/listinfo/simflex
>> SimFlex web page: http://www.ece.cmu.edu/~simflex
>
>
> _______________________________________________
> SimFlex mailing list
> [email protected]
> https://sos.ece.cmu.edu/mailman/listinfo/simflex
> SimFlex web page: http://www.ece.cmu.edu/~simflex
>
From masayuki at sc.isc.tohoku.ac.jp  Thu Jul 20 05:34:06 2006
From: masayuki at sc.isc.tohoku.ac.jp (Masayuki Sato)
List-Post: [email protected]
Date: Thu Jul 20 12:38:09 2006
Subject: [Simflex] Problem running CMPFlex.OoO
Message-ID: <1153388046.7728.31.ca...@lab-desk>

Hi all, My name is Masayuki Sato. Nice to meet you.

I tried to run CMPFlex.OoO following Getting Started Guide 2.1.1.
I used TraceCMPFlex to execute ./create-initial-flexpoint and
./creates-flexpoints. And next 
$./run-timing-jobs 0 26 -ma -cfg OoO CMPFlex.OoO 
But error messages appeared and CMPFlex.OoO could not be executed.
Please tell me about this sollution.

Simulator's host environment is SUSE Linux 10.1 i386, default g++
version is 4.1.0. 

--------- Error messages is below this line ----------

Flexus Simics simulator - Built as CMPFlex.OoO v2.1

2 <ComponentManager.cpp:81> {0}- Instantiating system with a width
factor of: 1
3 <Cache.hpp:82> {0}- L1d port BackSideOut_Prefetch is not wired
4 <CmpCache.hpp:85> {0}- L2 port BackSideOut_Snoop is not wired
5 <wiring.cpp:93> {0}-  initializing Parameters...
Warning: The 'flexus-CMPFlex.OoO-v9-iface-gcc' module unexpectedly
defined the 'Flexus' class
Warning: The 'flexus-CMPFlex.OoO-v9-iface-gcc' module unexpectedly
defined the 'SimicsInterface' class
6 <flexus.cpp:369> {0}- Set stat interval to : 50000
7 <flexus.cpp:374> {0}- Set region interval to : 50000
Opening debug output file: trace.out
Successfully parsed debug configurations from iteration.trace.cfg
8 <flexus.cpp:513> {0}- Loading Flexus state from subdirectory
flex_state_in
9 <ComponentManager.cpp:96> {0}- Initalizing components...
10 <FetchAddressGenerateImpl.cpp:90> {0}- Thread[0.0] connected to cpu0
Initial PC: v:00001035c
11 <microArch.cpp:169> {0}- sys-uarch connected to cpu0
12 <MemoryMapImpl.cpp:322> {0}- Page map file page_map.out was not
found.
13 <ComponentManager.cpp:127> {0}- Loading state: sys-fag
14 <BranchPredictor.cpp:751> {0}- sys-fag loaded branch predictor.  BTB
size: 1024 by 16 Bimodal size: 32768 Meta size: 8192 Gshare size: 13
15 <ComponentManager.cpp:127> {0}- Loading state: sys-ufetch
16 <uFetchImpl.cpp:123> {0}- Loading state: flex_state_in/sys-L1i for
ufetch order L1i cache
17 <uFetchImpl.cpp:167> {0}- Expected '<' when loading checkpoint
18 <uFetchImpl.cpp:132> {0}- Error loading checkpoint state from file:
flex_state_in/sys-L1i.  Make sure your checkpoints match your current
cache configuration.
19 <uFetchImpl.cpp:133> (<undefined>[<undefined>]) {0}- Assertion
failed: ((!(false))) : <undefined>
(*** Simics ***) Simics getting shaky, switching to 'safe' mode.
(*** Simics ***) Simics (main thread) received an abort signal, probably
an assertion.
pure virtual method called
terminate called without an active exception
(*** Simics ***) Simics getting shaky, switching to 'safe' mode.
(*** Simics ***) Simics (main thread) received an abort signal, probably
an assertion.


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