Re: Cardem under Manjaro/Arch: Some Troubleshooting

[Katharina Kohls]

Hi Harald,

below is the serial output for the master firmware. I first flashed and 
reset to verify that the serial output is working, then started cardem 
on the simtrace, and then rebooted the phone. For reference I have 
attached a cropped version of the serial output with the hoernchen 
branch firmware (which is obviously much longer).

BTW while debugging this I realized that the pin layout might be 
documented in the wrong order: The wiki says TX is on 4 (pin 1 = GND, 
pin 4 = TX, pin 5 = RX), however, for me it only worked when hooking up 
pin 5 with the RX of my UART to USB. Is that a typo?

Best,
Katharina

b'\r=============================================================================\n'
b'\rSIMtrace2 firmware 0.7.0.103-c690-dirty, BOARD=simtrace, APP=cardem\n'
b'\r(C) 2010-2019 by Harald Welte, 2018-2019 by Kevin Redon\n'
b'\r=============================================================================\n'
b'\r-I- Chip ID: 0x28900960 (Ext 0x00000000)\n'
b'\r-I- Serial Nr. 51203220-574a4a52-32303620-32313037\n'
b'\r-I- Reset Cause: user reset (NRST pin detected low)\n'
b'\r-I- USB init...\n'
b'\rUSBD_Init\n'
b'SetAddr(11) -W- Sta 0x888A8 [0] -W- _ -W- Sta 0x888A8 [0] -W- _ -W- 
Sta 0x888A8 [0] -W- _ SetCfg(1) cfgChanged1 -I- calling configure of all 
configurations...\n'
b'\r-I- Sniffer config\n'
b'\r-I- calling init of config 1...\n'
b'\r-I- Sniffer Init\n'
b'\r-I- entering main loop...\n'
b'\r-I- USB is now configured\n'
b'-W- Sta 0x88828 [0] -W- _ '
b'-I- Changed to ISO 7816-3 state 1\n'
b'\rreset de-asserted\n'
b'-I- WT updated to 9600 ETU\n'
b'\r-I- Changed to ISO 7816-3 state 0\n'
b'\rreset asserted\n'
b'\r-I- Changed to ISO 7816-3 state 1\n'
b'\rreset de-asserted\n'
b'-I- WT updated to 9600 ETU\n'
b'\r-I- Changed to ISO 7816-3 state 0\n'
b'\rreset asserted\n'
b'\r-I- Changed to ISO 7816-3 state 1\n'
b'\rreset de-asserted\n'
b'-I- WT updated to 9600 ETU\n'
b'\r-I- Changed to ISO 7816-3 state 0\n'
b'\rreset asserted\n'
b'\r-I- Changed to ISO 7816-3 state 1\n'
b'\rreset de-asserted\n'
b'-I- WT updated to 9600 ETU\n'
b'\r-I- Changed to ISO 7816-3 state 0\n'

On 5/20/21 5:11 PM, Harald Welte wrote:
Hi Katharina,

On Thu, May 20, 2021 at 04:46:57PM +0200, Katharina Kohls wrote:
Hi Harald,

I just switched to the master branch, rebuilt the firmware
(simtrace-cardem-dfu), flashed again and tested: It doesn't seem to work and
is back to a state where the phone doesn't even recognize it has a SIM
(after reboot). Switching back to the hoernchen branch (+build + flash +run
+reboot) still works.
Thanks for your feedback.  It would be great to get the log output of the
host software in this scenario, and - if you have a serial cable - the debug
UART (2.5mm stereo jack) of the SIMtrace2 device.

Regards,
        Harald


b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 0f 04 5a\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 06\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (6)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 05 04 5a\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 d6 00 00 01\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (1)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 02\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (2)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 02\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (2)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 03 04 38\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 01 04 08\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 70 80 01 00\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 02\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (2)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 44\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 0c 04 5a\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 d6 00 00 0b\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (11)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 01 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 1d\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 0d 04 5a\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 1d\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 1d\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 70 00 00 01\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 01 a4 04 04 0c\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (12)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 01 a4 00 04 02\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (2)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 01 c0 00 00 2e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 01 04 1c\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 06\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (6)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 01 04 12\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a2 01 04 28\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (40)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 01\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 1d\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b0 00 00 01\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 1d\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b0 00 00 01\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 70 80 01 00\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 01 04 28\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 02 04 1c\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 03 04 1c\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 04 04 1c\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a2 01 04 b0\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (176)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 14\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 05 04 1c\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 18 04 5a\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a2 01 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (30)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 0a\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 01 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a2 01 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (30)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 03\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 01 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 06\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (6)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 01 04 12\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 06\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (6)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 07 04 5a\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 06\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (6)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 06\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (6)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 06\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (6)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 04\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (4)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 20\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 06\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (6)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a2 01 04 02\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (2)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 fa\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 01 04 02\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a4 08 04 06\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (6)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 21\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 a2 01 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: flush_rx_buffer (30)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 c0 00 00 ed\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 01 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 03 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 04 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 05 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 06 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 07 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 08 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 09 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 0b 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 0c 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 0d 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 0e 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: USART WT set to 9600 ETU\r\n'
b'-I- 0: send_tpdu_header: 00 b2 0f 04 1e\r\n'
b'-I- 0: flush_rx_buffer (5)\n'
b'\r-I- 0: USART WT set to 0 ETU\r\n'
b'-I- 0: skipping unsupported card_insert to REMOVED\r\n'