Hi, i'm newbie in this topic (SIP), and I tried to implement over FPGA
specify in a Xilinx Spartan 3E, but the fact is that i don't know the
architecture of SIP, I study the RFC3261 but I don't understand very
well. I request your help to understand the protocol and implement in a
FPGA with VHDL.
I wait your answer. thanks...
PD: Sorry, but my english is not very good xD
_______________________________________________
Sip mailing list https://www1.ietf.org/mailman/listinfo/sip
This list is for NEW development of the core SIP Protocol
Use [EMAIL PROTECTED] for questions on current sip
Use [EMAIL PROTECTED] for new developments on the application of sip
