Hi Yegor, Yegor Yefremov wrote: > SJA1000: add read/write routines for 8, 16 and 32-bit register access > > Signed-off-by: Yegor Yefremov <[email protected]>
Fine with me, even if the names are somehow misleading. In fact, you speak about 8-bit sparse access. But it's used that way already here: http://lxr.linux.no/#linux+v2.6.33/drivers/i2c/busses/i2c-pca-platform.c#L198 Could you please prepare proper patches (also for the other one) for mainline inclusion as described here: http://svn.berlios.de/svnroot/repos/socketcan/trunk/README.submitting-patches Thanks, Wolfgang. _______________________________________________ Socketcan-core mailing list [email protected] https://lists.berlios.de/mailman/listinfo/socketcan-core
