Marc Kleine-Budde wrote:
> Kurt Van Dijck wrote:
>>> I think a "pure" ratelimit isn't a good choice. From my point of view
>>> (with no CAN background) we should limit only if the errors are
>>> consecutive, a successfully transmitted or received CAN frame should
>>> reset our limiter.
> 
>> Or a bus-off indication.
> 
> ACK

ACK.

>> Resetting the rate-limit at successfull tx or rx requires disabling
>> _only_  the bus-error interrupt and not the TX & RX interrupt,
>> and is therefore chip specific?
> 
> Yes, of course. We just want to limit the error interrupts but not the
> active/passive/warning/busoff and of course the rx/tx interrupts.
> 
> On the at91_can you can individually mask the errors. IIRC the sja1000
> can do likewise.

Normally bus-error interrupts have a dedicated bit in the interrupt
enable register. This approach is, as I expected, complex and rather
tricky and delicate. I still prefer the simple solution of disabling the
bus error interrupts globally. I believe, that most people/apps do not
check bus-errors at all. Other opinions? It would be nice to hear real
CAN users and experts.

Wolfgang.
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