Hi,My s3c64xx (ARM11),use following design,
GPN1--->ALE (Data address ALE signal)
GPN2--->Can interrupt
GPN3--->Data Direction,LOW (SJA1000-->s3c6410),High (S3C6410->sja1000)
GPK11:RESET
I use following code to drivers/net/can/sja1000/sja1000_platform.c,want to
replace default read/write with my
s3c64xx_sja1000_read_reg8/s3c64xx_sja1000_write_reg8;
#ifdef CONFIG_ARCH_S3C64XX
/*S3C64XX CAN SJA1000,ALE Pin --->S3C64XX GPN1*/
/*-----SJA1000 ALE Pin-----*/
#define BSJA1000_ALE_PIN { gpio_set_value(S3C64XX_GPN(1),0x1);} /*Set
Bit,Open ALE Lock*/
#define CSJA1000_ALE_PIN { gpio_set_value(S3C64XX_GPN(1),0x0);} /*Clear
Bit,Close ALE Lock*/
/*-----SJA1000 RESET Pin-----*/
#define BSJA1000_RST_PIN { gpio_set_value(S3C64XX_GPK(11),0x1);} /*RESET
PIN,High*/
#define CSJA1000_RST_PIN { gpio_set_value(S3C64XX_GPK(11),0x0);} /*RESET PIN
Low,Available*/
/*-----SJA1000 Interrupt Pin-----*/
#define BSJA1000_INT_PIN { s3c_gpio_cfgpin(S3C64XX_GPN(0),
S3C64XX_GPN0_EINT0);s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);}
/*-----SJA1000 CS Pin-----*/
#define BSJA1000_CS_PIN { __raw_writel(
readl(S3C_MEM_SYS_CFG)|1<<4,S3C_MEM_SYS_CFG);}/*Use S3C64XX CS4*/
#define CSJA1000_CS_PIN { __raw_writel( readl(S3C_MEM_SYS_CFG)&
~(1<<4),S3C_MEM_SYS_CFG);}/*Use S3C64XX CS4*/
#define SJA1000_DATA_DIR_H { gpio_set_value(S3C64XX_GPN(3),0x1);}
#define SJA1000_DATA_DIR_L { gpio_set_value(S3C64XX_GPN(3),0x0);}
#endif
static u8 s3c64xx_sja1000_read_reg8(const struct sja1000_priv *priv, int reg)
{
#if 1
volatile unsigned int data;
BSJA1000_CS_PIN //CS High
SJA1000_DATA_DIR_H //
BSJA1000_ALE_PIN //ALE high
iowrite8(reg, priv->reg_base);
CSJA1000_ALE_PIN //ALE low
CSJA1000_CS_PIN //CS low
//?RD Signal Low?
SJA1000_DATA_DIR_L
data=ioread8(priv->reg_base + reg);
return data;
#endif
}
static void s3c64xx_sja1000_write_reg8(const struct sja1000_priv *priv, int
reg, u8 val)
{
#if 1
BSJA1000_CS_PIN //CS High
SJA1000_DATA_DIR_H
BSJA1000_ALE_PIN //ALE high
iowrite8(reg, priv->reg_base);
CSJA1000_ALE_PIN //ALE low
CSJA1000_CS_PIN //CS low
iowrite8(val, priv->reg_base + reg);
#endif
}
when kernel booting:
bd: registered device at major 43
CAN device driver interface
sja1000 CAN netdevice driver
Unhandled fault: external abort on linefetch (0x1806) at 0x00000000
Internal error: : 1806 [#1]
Modules linked in:
CPU: 0 Not tainted (2.6.29 #495)
PC is at s3c_gpiolib_set+0x28/0x4c
LR is at __gpio_set_value+0x30/0x38
pc : [<c0039974>] lr : [<c015005c>] psr: 60000093
sp : cf821dbc ip : 60000013 fp : cf821dcc
r10: c04247f8 r9 : c04244b0 r8 : c04247dc
r7 : c04245c0 r6 : 00000000 r5 : cfdb3b60 r4 : f4500830
r3 : 00000002 r2 : 00000000 r1 : 00000001 r0 : 0000f1f6
Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
Control: 00c5387d Table: 50004008 DAC: 00000017
that means my sja1000 read timing has some issue need to fix ? can some one
give some tips?
B.R
Tommy
At 2011-07-15 14:52:48，"Oliver Hartkopp" <[email protected]> wrote:
>On 14.07.2011 10:32, tommy.hong wrote:
>
>> [root@s3c6410 /]# ifconfig can0 up
>> sja1000_platform sja1000_platform.0: bit-timing not yet defined
>> ifconfig: SIOCSIFFLAGS: Invalid argument
>> [root@s3c64xx /]# cat /proc/interrupts
>>
>> there are no my CAN interrupt
>>
>> according to above error,i need to use iproute to "ip link set can0 up type
>> can bitrate 1000000"?
>
>We formerly had a misconfiguration problem for the bitrate on ubuntu systems.
>
>Please check whether CONFIG_CAN_CALC_BITTIMING=y in your kernel konfig
>
>and - yes, you need to use iproute to set the bitrate.
>
>Setting the bitrate is *mandatory* to set the interface to 'up'.
>
>Regards,
>Oliver
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