>Got it
>That means I don't have to offset my VFO which simplifies
>things considerably ... no more than I use DRM, I can just figure the
>offset in my head on the rare occasion I use that mode
Jr_dakota,
There are some advantages to still keeping a very low IF in your design:
DC errors, capacitive coupling, leakage of an local oscillator into the
RF input stage which could end up saturating some analog stages into the
+- suplly rails.
I just wanted to add that P-T implied by treating the signal as a
passband is that you can sample at various rates independent of the
starting and stopping frequencies but dependent on the difference of the
stopping and starting frequencies. A low IF design is a good opportunity
for you to check up on undersampling and "near zero IF". Don't forget
that the main problem of higher processing in these designs is not at
all significant for your CPU.
Frank
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