Here is a link about phase noise with CY27EE16: http://www.elexs.de/clock3.htm
You can translate it with Google. - Henry ehydra schrieb: > > k5nwa schrieb: >> At 01:57 PM 4/20/2008, you wrote: >> >>> Hi Dave and others - >>> >>> After thinking about what is going on, my question is: >>> Is the 400ps spec in the datasheet another way of a spur definition? Can >>> I simply see the jitter as a short-term time-delay at the output? This >>> will translate the programmed nominal output frequency to another >>> frequency... >>> >>> The CY22393 is a PLL-type system. One can set the PLL loop-bandwidth in >>> a register. Unfortunately the data sheet doesn't cover this area, nor >>> where optimum jitter performance would be possible. Maybe a good >>> relation between quartz- and programmed output frequencies will drive >>> jitter considerable down? >>> >>> Someone knows more? >> Depends on the nature of the jitter if its repeatable it shows up as >> spurs if it's random it shows and a higher noise floor. > > At the moment I think it is more spurs than noise floor. I will try to > contact the electronics department on the local university. Maybe they > have and allow me to use their SA. > > >> Took bad they didn't use the SI570 chip, it has .4 ps jitter not 400 >> or approximately 1000 times less. Maybe someone will modify it someday. >> > > I ordered samples of the SI571. Unfortunately even after weeks no > response from silabs :-( > > On datasheet the rf spec of the SI57x devices look very good. The other > side of the coin is price and power consumption. Both really heavy. That > would kick them out of most mobile apps. > > Other comparable devices? I need at least two PLL on the chip. > > regards - > Henry > > >> Cecil >> K5NWA >> www.softrockradio.org www.qrpradio.com >> >> "Blessed are the cracked, for they shall let in the light." >> >> >> ------------------------------------ >> >> Yahoo! Groups Links >> >> >> >> > > ------------------------------------ > > Yahoo! Groups Links > > > >
