Re: CVS commit: src/sys/arch/x86/x86

[Maxime Villard]

Le 07/02/2018 à 23:49, Maya Rashish a écrit :

Module Name:    src
Committed By:   maya
Date:           Wed Feb  7 22:49:32 UTC 2018

Modified Files:
        src/sys/arch/x86/x86: identcpu.c

Log Message:
stopgap fix: restrict XSAVEOPT to Intel CPUs

The current code causes floating point miscalculations on AMD Ryzen.
PR port-amd64/52966: amd64 FPU handling broken on AMD


To generate a diff of this commit:
cvs rdiff -u -r1.67 -r1.68 src/sys/arch/x86/x86/identcpu.c

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Thanks, mlelstv told me about this a week ago, and I just hadn't gotten
around to fixing it yet.

It would be better to disable XSAVEOPT entirely (including on Intel), until
I add a bunch of KASSERTs to ensure the spec is respected.

Maxime