Module Name: src
Committed By: msaitoh
Date: Wed May 29 03:24:23 UTC 2019
Modified Files:
src/usr.sbin/cpuctl/arch: i386.c
Log Message:
White space fix. No functional change.
To generate a diff of this commit:
cvs rdiff -u -r1.102 -r1.103 src/usr.sbin/cpuctl/arch/i386.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/usr.sbin/cpuctl/arch/i386.c
diff -u src/usr.sbin/cpuctl/arch/i386.c:1.102 src/usr.sbin/cpuctl/arch/i386.c:1.103
--- src/usr.sbin/cpuctl/arch/i386.c:1.102 Tue May 28 07:51:58 2019
+++ src/usr.sbin/cpuctl/arch/i386.c Wed May 29 03:24:23 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: i386.c,v 1.102 2019/05/28 07:51:58 msaitoh Exp $ */
+/* $NetBSD: i386.c,v 1.103 2019/05/29 03:24:23 msaitoh Exp $ */
/*-
* Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -57,7 +57,7 @@
#include <sys/cdefs.h>
#ifndef lint
-__RCSID("$NetBSD: i386.c,v 1.102 2019/05/28 07:51:58 msaitoh Exp $");
+__RCSID("$NetBSD: i386.c,v 1.103 2019/05/29 03:24:23 msaitoh Exp $");
#endif /* not lint */
#include <sys/types.h>
@@ -168,7 +168,7 @@ static const char * const i386_intel_bra
"Pentium III", /* Intel (R) Pentium (R) III processor */
"", /* 0x05: Reserved */
"Mobile Pentium III",/* Mobile Intel (R) Pentium (R) III processor-M */
- "Mobile Celeron", /* Mobile Intel (R) Celeron (R) processor */
+ "Mobile Celeron", /* Mobile Intel (R) Celeron (R) processor */
"Pentium 4", /* Intel (R) Pentium (R) 4 processor */
"Pentium 4", /* Intel (R) Pentium (R) 4 processor */
"Celeron", /* Intel (R) Celeron (TM) processor */
@@ -321,10 +321,10 @@ const struct cpu_cpuid_nameclass i386_cp
[0x06] = "Celeron (Mendocino)",
[0x07] = "Pentium III (Katmai)",
[0x08] = "Pentium III (Coppermine)",
- [0x09] = "Pentium M (Banias)",
+ [0x09] = "Pentium M (Banias)",
[0x0a] = "Pentium III Xeon (Cascades)",
[0x0b] = "Pentium III (Tualatin)",
- [0x0d] = "Pentium M (Dothan)",
+ [0x0d] = "Pentium M (Dothan)",
[0x0e] = "Pentium Core Duo, Core solo",
[0x0f] = "Xeon 30xx, 32xx, 51xx, 53xx, 73xx, "
"Core 2 Quad 6xxx, "
@@ -729,7 +729,7 @@ static void
cyrix6x86_cpu_setup(struct cpu_info *ci)
{
- /*
+ /*
* Do not disable the TSC on the Geode GX, it's reported to
* work fine.
*/
@@ -979,7 +979,7 @@ amd_family6_probe(struct cpu_info *ci)
if (*cpu_brand_string == '\0')
return;
-
+
for (i = 1; i < __arraycount(amd_brand); i++)
if ((p = strstr(cpu_brand_string, amd_brand[i])) != NULL) {
ci->ci_brand_id = i;
@@ -1230,10 +1230,10 @@ intel_cpu_cacheinfo(struct cpu_info *ci)
}
}
-static const struct x86_cache_info amd_cpuid_l2cache_assoc_info[] =
+static const struct x86_cache_info amd_cpuid_l2cache_assoc_info[] =
AMD_L2CACHE_INFO;
-static const struct x86_cache_info amd_cpuid_l3cache_assoc_info[] =
+static const struct x86_cache_info amd_cpuid_l3cache_assoc_info[] =
AMD_L3CACHE_INFO;
static void
@@ -2112,8 +2112,8 @@ identifycpu(int fd, const char *cpuname)
if (cpu_vendor == CPUVENDOR_AMD) {
if (ci->ci_family == 6 && ci->ci_model >= 6) {
if (ci->ci_brand_id == 1)
- /*
- * It's Duron. We override the
+ /*
+ * It's Duron. We override the
* name, since it might have
* been misidentified as Athlon.
*/
@@ -2131,7 +2131,7 @@ identifycpu(int fd, const char *cpuname)
name = tmp;
}
}
-
+
if (cpu_vendor == CPUVENDOR_IDT && ci->ci_family >= 6)
vendorname = "VIA";
}
@@ -2256,7 +2256,7 @@ identifycpu(int fd, const char *cpuname)
|| (cpu_vendor == CPUVENDOR_AMD))) {
uint16_t lmin, lmax;
x86_cpuid(5, descs);
-
+
print_bits(cpuname, "MONITOR/MWAIT extensions",
CPUID_MON_FLAGS, descs[2]);
lmin = __SHIFTOUT(descs[0], CPUID_MON_MINSIZE);
