Module Name:    src
Committed By:   skrll
Date:           Thu Jul 11 10:53:39 UTC 2019

Modified Files:
        src/sys/arch/aarch64/aarch64: locore.S

Log Message:
Typo in comment


To generate a diff of this commit:
cvs rdiff -u -r1.34 -r1.35 src/sys/arch/aarch64/aarch64/locore.S

Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

Modified files:

Index: src/sys/arch/aarch64/aarch64/locore.S
diff -u src/sys/arch/aarch64/aarch64/locore.S:1.34 src/sys/arch/aarch64/aarch64/locore.S:1.35
--- src/sys/arch/aarch64/aarch64/locore.S:1.34	Thu Jul 11 09:03:41 2019
+++ src/sys/arch/aarch64/aarch64/locore.S	Thu Jul 11 10:53:39 2019
@@ -1,4 +1,4 @@
-/*	$NetBSD: locore.S,v 1.34 2019/07/11 09:03:41 skrll Exp $	*/
+/*	$NetBSD: locore.S,v 1.35 2019/07/11 10:53:39 skrll Exp $	*/
 
 /*
  * Copyright (c) 2017 Ryo Shimizu <r...@nerv.org>
@@ -38,7 +38,7 @@
 #include <aarch64/hypervisor.h>
 #include "assym.h"
 
-RCSID("$NetBSD: locore.S,v 1.34 2019/07/11 09:03:41 skrll Exp $")
+RCSID("$NetBSD: locore.S,v 1.35 2019/07/11 10:53:39 skrll Exp $")
 
 
 /*#define DEBUG_LOCORE			/* debug print */
@@ -363,7 +363,7 @@ ENTRY_NP(cpu_mpstart)
 	add	x1, x1, #1
 	cmp	x1, MAXCPUS		/* cpuindex >= MAXCPUS ? */
 	bge	toomanycpus
-	ldr	x2, [x0, x1, lsl #3]	/* cpu_mpidr[cpunidex] */
+	ldr	x2, [x0, x1, lsl #3]	/* cpu_mpidr[cpuindex] */
 	cmp	x2, x3			/* == mpidr_el1 & MPIDR_AFF ? */
 	bne	1b
 

Reply via email to