Module Name: src
Committed By: jmcneill
Date: Sun Jul 28 10:03:56 UTC 2019
Modified Files:
src/sys/arch/arm/dts: rk3399-rockpro64.dts
Log Message:
Set max link speed, remove assigned clocks
To generate a diff of this commit:
cvs rdiff -u -r1.6 -r1.7 src/sys/arch/arm/dts/rk3399-rockpro64.dts
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/dts/rk3399-rockpro64.dts
diff -u src/sys/arch/arm/dts/rk3399-rockpro64.dts:1.6 src/sys/arch/arm/dts/rk3399-rockpro64.dts:1.7
--- src/sys/arch/arm/dts/rk3399-rockpro64.dts:1.6 Wed Jun 12 10:13:44 2019
+++ src/sys/arch/arm/dts/rk3399-rockpro64.dts Sun Jul 28 10:03:56 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rk3399-rockpro64.dts,v 1.6 2019/06/12 10:13:44 jmcneill Exp $ */
+/* $NetBSD: rk3399-rockpro64.dts,v 1.7 2019/07/28 10:03:56 jmcneill Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill <[email protected]>
@@ -71,12 +71,9 @@
};
&pcie0 {
- assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
- assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
- assigned-clock-rates = <100000000>;
-
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
+ max-link-speed = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn>;
vpcie3v3-supply = <&vcc3v3_pcie>;
