Module Name: src
Committed By: msaitoh
Date: Wed Aug 7 14:58:04 UTC 2019
Modified Files:
src/sys/external/bsd/drm2/dist/drm/i915: i915_reg.h intel_pm.c
Log Message:
Use unsigned to avoid undefined behavior. Found by kUBSan.
To generate a diff of this commit:
cvs rdiff -u -r1.9 -r1.10 src/sys/external/bsd/drm2/dist/drm/i915/i915_reg.h
cvs rdiff -u -r1.18 -r1.19 src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/external/bsd/drm2/dist/drm/i915/i915_reg.h
diff -u src/sys/external/bsd/drm2/dist/drm/i915/i915_reg.h:1.9 src/sys/external/bsd/drm2/dist/drm/i915/i915_reg.h:1.10
--- src/sys/external/bsd/drm2/dist/drm/i915/i915_reg.h:1.9 Mon Aug 5 13:28:31 2019
+++ src/sys/external/bsd/drm2/dist/drm/i915/i915_reg.h Wed Aug 7 14:58:04 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: i915_reg.h,v 1.9 2019/08/05 13:28:31 msaitoh Exp $ */
+/* $NetBSD: i915_reg.h,v 1.10 2019/08/07 14:58:04 msaitoh Exp $ */
/* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
* All Rights Reserved.
@@ -2032,7 +2032,7 @@ enum skl_disp_power_wells {
#define FBC_CFB_BASE 0x03200 /* 4k page aligned */
#define FBC_LL_BASE 0x03204 /* 4k page aligned */
#define FBC_CONTROL 0x03208
-#define FBC_CTL_EN (1<<31)
+#define FBC_CTL_EN __BIT(31)
#define FBC_CTL_PERIODIC (1<<30)
#define FBC_CTL_INTERVAL_SHIFT (16)
#define FBC_CTL_UNCOMPRESSIBLE (1<<14)
@@ -3540,7 +3540,7 @@ enum skl_disp_power_wells {
/* Panel fitting */
#define PFIT_CONTROL (dev_priv->info.display_mmio_offset + 0x61230)
-#define PFIT_ENABLE (1 << 31)
+#define PFIT_ENABLE __BIT(31)
#define PFIT_PIPE_MASK (3 << 29)
#define PFIT_PIPE_SHIFT 29
#define VERT_INTERP_DISABLE (0 << 10)
@@ -4583,7 +4583,7 @@ enum skl_disp_power_wells {
/* pnv/gen4/g4x/vlv/chv */
#define DSPFW1 (dev_priv->info.display_mmio_offset + 0x70034)
#define DSPFW_SR_SHIFT 23
-#define DSPFW_SR_MASK (0x1ff<<23)
+#define DSPFW_SR_MASK (0x1ffU<<23)
#define DSPFW_CURSORB_SHIFT 16
#define DSPFW_CURSORB_MASK (0x3f<<16)
#define DSPFW_PLANEB_SHIFT 8
Index: src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c
diff -u src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c:1.18 src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c:1.19
--- src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c:1.18 Mon Aug 5 10:14:19 2019
+++ src/sys/external/bsd/drm2/dist/drm/i915/intel_pm.c Wed Aug 7 14:58:04 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: intel_pm.c,v 1.18 2019/08/05 10:14:19 msaitoh Exp $ */
+/* $NetBSD: intel_pm.c,v 1.19 2019/08/07 14:58:04 msaitoh Exp $ */
/*
* Copyright © 2012 Intel Corporation
@@ -28,7 +28,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: intel_pm.c,v 1.18 2019/08/05 10:14:19 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: intel_pm.c,v 1.19 2019/08/07 14:58:04 msaitoh Exp $");
#include <linux/bitops.h>
#include <linux/cpufreq.h>
@@ -289,7 +289,7 @@ static void chv_set_memory_pm5(struct dr
}
#define FW_WM(value, plane) \
- (((value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK)
+ (((u32)(value) << DSPFW_ ## plane ## _SHIFT) & DSPFW_ ## plane ## _MASK)
void intel_set_memory_cxsr(struct drm_i915_private *dev_priv, bool enable)
{
