Module Name: src
Committed By: maxv
Date: Sat Sep 7 18:56:01 UTC 2019
Modified Files:
src/sys/arch/amd64/amd64: cpufunc.S
src/sys/arch/amd64/conf: Makefile.amd64 files.amd64
src/sys/arch/xen/conf: files.xen
Removed Files:
src/sys/arch/amd64/amd64: amd64func.S
Log Message:
Merge amd64func.S into cpufunc.S, and clean up.
To generate a diff of this commit:
cvs rdiff -u -r1.7 -r0 src/sys/arch/amd64/amd64/amd64func.S
cvs rdiff -u -r1.44 -r1.45 src/sys/arch/amd64/amd64/cpufunc.S
cvs rdiff -u -r1.77 -r1.78 src/sys/arch/amd64/conf/Makefile.amd64
cvs rdiff -u -r1.112 -r1.113 src/sys/arch/amd64/conf/files.amd64
cvs rdiff -u -r1.178 -r1.179 src/sys/arch/xen/conf/files.xen
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/amd64/amd64/cpufunc.S
diff -u src/sys/arch/amd64/amd64/cpufunc.S:1.44 src/sys/arch/amd64/amd64/cpufunc.S:1.45
--- src/sys/arch/amd64/amd64/cpufunc.S:1.44 Sat Sep 7 18:33:16 2019
+++ src/sys/arch/amd64/amd64/cpufunc.S Sat Sep 7 18:56:01 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.S,v 1.44 2019/09/07 18:33:16 maxv Exp $ */
+/* $NetBSD: cpufunc.S,v 1.45 2019/09/07 18:56:01 maxv Exp $ */
/*
* Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
@@ -29,10 +29,6 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
-/*
- * Functions to provide access to i386-specific instructions.
- */
-
#include <sys/errno.h>
#include <machine/asm.h>
@@ -81,6 +77,16 @@ ENTRY(invlpg)
ret
END(invlpg)
+ENTRY(lgdt)
+ /* Reload the descriptor table. */
+ movq %rdi,%rax
+ lgdt (%rax)
+ /* Flush the prefetch queue. */
+ jmp 1f
+ nop
+1: jmp _C_LABEL(lgdt_finish)
+END(lgdt)
+
ENTRY(lidt)
lidt (%rdi)
ret
@@ -100,27 +106,7 @@ ENTRY(ltr)
ltr %di
ret
END(ltr)
-#endif
-/*
- * Big hammer: flush all TLB entries, including ones from PTE's
- * with the G bit set. This should only be necessary if TLB
- * shootdown falls far behind.
- *
- * Intel Architecture Software Developer's Manual, Volume 3,
- * System Programming, section 9.10, "Invalidating the
- * Translation Lookaside Buffers (TLBS)":
- * "The following operations invalidate all TLB entries, irrespective
- * of the setting of the G flag:
- * ...
- * "(P6 family processors only): Writing to control register CR4 to
- * modify the PSE, PGE, or PAE flag."
- *
- * (the alternatives not quoted above are not an option here.)
- *
- * If PGE is not in use, we reload CR3.
- */
-#ifndef XENPV
ENTRY(tlbflushg)
movq %cr4, %rax
testq $CR4_PGE, %rax
@@ -150,6 +136,20 @@ ENTRY(tlbflush)
ret
END(tlbflush)
+ENTRY(wbinvd)
+ wbinvd
+ ret
+END(wbinvd)
+
+ENTRY(setusergs)
+ CLI(ax)
+ swapgs
+ movw %di, %gs
+ swapgs
+ STI(ax)
+ ret
+END(setusergs)
+
ENTRY(x86_read_flags)
pushfq
popq %rax
@@ -165,33 +165,38 @@ ENTRY(x86_write_flags)
END(x86_write_flags)
STRONG_ALIAS(x86_write_psl,x86_write_flags)
-#endif /* XENPV */
-/*
- * Support for reading MSRs in the safe manner (returns EFAULT on fault)
- */
-/* int rdmsr_safe(u_int msr, uint64_t *data) */
+ENTRY(tsc_get_timecount)
+ movq CPUVAR(CURLWP), %rcx
+1:
+ movq L_NCSW(%rcx), %rdi
+ rdtsc
+ addl CPUVAR(CC_SKEW), %eax
+ cmpq %rdi, L_NCSW(%rcx)
+ jne 2f
+ ret
+2:
+ jmp 1b
+END(tsc_get_timecount)
+#endif /* !XENPV */
+
ENTRY(rdmsr_safe)
movq CPUVAR(CURLWP), %r8
movq L_PCB(%r8), %r8
movq $_C_LABEL(msr_onfault), PCB_ONFAULT(%r8)
- movl %edi, %ecx /* u_int msr */
- rdmsr /* Read MSR pointed by %ecx. Returns
- hi byte in edx, lo in %eax */
- salq $32, %rdx /* sign-shift %rdx left */
+ movl %edi, %ecx
+ rdmsr
+ salq $32, %rdx
movl %eax, %eax /* zero-extend %eax -> %rax */
orq %rdx, %rax
- movq %rax, (%rsi) /* *data */
- xorq %rax, %rax /* "no error" */
+ movq %rax, (%rsi)
+ xorq %rax, %rax
movq %rax, PCB_ONFAULT(%r8)
ret
END(rdmsr_safe)
-/*
- * MSR operations fault handler
- */
ENTRY(msr_onfault)
movq CPUVAR(CURLWP), %r8
movq L_PCB(%r8), %r8
@@ -200,13 +205,6 @@ ENTRY(msr_onfault)
ret
END(msr_onfault)
-#ifndef XENPV
-ENTRY(wbinvd)
- wbinvd
- ret
-END(wbinvd)
-#endif
-
ENTRY(cpu_counter)
xorq %rax, %rax
rdtsc
@@ -258,28 +256,7 @@ ENTRY(__byte_swap_u16_variable)
END(__byte_swap_u16_variable)
/*
- * void lgdt(struct region_descriptor *rdp);
- *
- * Load a new GDT pointer (and do any necessary cleanup).
- * XXX It's somewhat questionable whether reloading all the segment registers
- * is necessary, since the actual descriptor data is not changed except by
- * process creation and exit, both of which clean up via task switches.
- */
-#ifndef XENPV
-ENTRY(lgdt)
- /* Reload the descriptor table. */
- movq %rdi,%rax
- lgdt (%rax)
- /* Flush the prefetch q. */
- jmp 1f
- nop
-1: jmp _C_LABEL(lgdt_finish)
-END(lgdt)
-#endif
-
-/*
- * void lgdt_finish(void);
- * Reload segments after a GDT change
+ * Reload segments after a GDT change.
*/
ENTRY(lgdt_finish)
movl $GSEL(GDATA_SEL, SEL_KPL),%eax
@@ -290,8 +267,6 @@ ENTRY(lgdt_finish)
END(lgdt_finish)
/*
- * void x86_flush()
- *
* Flush instruction pipelines by doing an intersegment (far) return.
*/
ENTRY(x86_flush)
@@ -487,14 +462,3 @@ ENTRY(outsl)
outsl
ret
END(outsl)
-
-#ifndef XENPV
-ENTRY(setusergs)
- CLI(ax)
- swapgs
- movw %di, %gs
- swapgs
- STI(ax)
- ret
-END(setusergs)
-#endif
Index: src/sys/arch/amd64/conf/Makefile.amd64
diff -u src/sys/arch/amd64/conf/Makefile.amd64:1.77 src/sys/arch/amd64/conf/Makefile.amd64:1.78
--- src/sys/arch/amd64/conf/Makefile.amd64:1.77 Wed May 22 08:31:25 2019
+++ src/sys/arch/amd64/conf/Makefile.amd64 Sat Sep 7 18:56:01 2019
@@ -1,4 +1,4 @@
-# $NetBSD: Makefile.amd64,v 1.77 2019/05/22 08:31:25 kamil Exp $
+# $NetBSD: Makefile.amd64,v 1.78 2019/09/07 18:56:01 maxv Exp $
# Makefile for NetBSD
#
@@ -89,7 +89,7 @@ LINKFLAGS_NORMAL= -X
# depend on CPU configuration
locore.o machdep.o: Makefile
-acpi_wakeup_low.o amd64func.o busfunc.o cpufunc.o cpu_in_cksum.o: assym.h
+acpi_wakeup_low.o busfunc.o cpufunc.o cpu_in_cksum.o: assym.h
linux_sigcode.o linux32_sigcode.o lock_stubs.o mptramp.o: assym.h
netbsd32_sigcode.o: assym.h
Index: src/sys/arch/amd64/conf/files.amd64
diff -u src/sys/arch/amd64/conf/files.amd64:1.112 src/sys/arch/amd64/conf/files.amd64:1.113
--- src/sys/arch/amd64/conf/files.amd64:1.112 Fri Feb 15 08:54:01 2019
+++ src/sys/arch/amd64/conf/files.amd64 Sat Sep 7 18:56:01 2019
@@ -1,4 +1,4 @@
-# $NetBSD: files.amd64,v 1.112 2019/02/15 08:54:01 nonaka Exp $
+# $NetBSD: files.amd64,v 1.113 2019/09/07 18:56:01 maxv Exp $
#
# new style config file for amd64 architecture
#
@@ -36,7 +36,6 @@ file arch/amd64/amd64/vector.S machdep
file arch/amd64/amd64/copy.S machdep
file arch/amd64/amd64/spl.S machdep
-file arch/amd64/amd64/amd64func.S machdep
file arch/amd64/amd64/amd64_trap.S machdep
file arch/amd64/amd64/autoconf.c machdep
file arch/amd64/amd64/busfunc.S machdep
Index: src/sys/arch/xen/conf/files.xen
diff -u src/sys/arch/xen/conf/files.xen:1.178 src/sys/arch/xen/conf/files.xen:1.179
--- src/sys/arch/xen/conf/files.xen:1.178 Thu Feb 14 08:18:26 2019
+++ src/sys/arch/xen/conf/files.xen Sat Sep 7 18:56:01 2019
@@ -1,4 +1,4 @@
-# $NetBSD: files.xen,v 1.178 2019/02/14 08:18:26 cherry Exp $
+# $NetBSD: files.xen,v 1.179 2019/09/07 18:56:01 maxv Exp $
# NetBSD: files.x86,v 1.10 2003/10/08 17:30:00 bouyer Exp
# NetBSD: files.i386,v 1.254 2004/03/25 23:32:10 jmc Exp
@@ -65,7 +65,6 @@ file crypto/blowfish/arch/i386/bf_cbc.S
elifdef amd64
file arch/amd64/amd64/autoconf.c xenpvhvm
-file arch/amd64/amd64/amd64func.S machdep & xenpvhvm
file arch/amd64/amd64/busfunc.S
file arch/amd64/amd64/cpufunc.S
file arch/amd64/amd64/cpu_in_cksum.S (inet | inet6) & cpu_in_cksum
