Module Name: src
Committed By: martin
Date: Sun Sep 22 10:29:44 UTC 2019
Modified Files:
src/sys/arch/aarch64/aarch64 [netbsd-9]: cpufunc_asm_armv8.S
Log Message:
Pull up following revision(s) (requested by ryo in ticket #213):
sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S: revision 1.4
even if "no options MULTIPROCESSOR" requires isb after tlbi op. since it should
be harmless, dsb is also added.
fixed a problem that rockpro64 doesn't boot without MULTIPROCESSOR.
To generate a diff of this commit:
cvs rdiff -u -r1.3 -r1.3.4.1 src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S
diff -u src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S:1.3 src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S:1.3.4.1
--- src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S:1.3 Fri Dec 21 08:01:01 2018
+++ src/sys/arch/aarch64/aarch64/cpufunc_asm_armv8.S Sun Sep 22 10:29:44 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc_asm_armv8.S,v 1.3 2018/12/21 08:01:01 ryo Exp $ */
+/* $NetBSD: cpufunc_asm_armv8.S,v 1.3.4.1 2019/09/22 10:29:44 martin Exp $ */
/*-
* Copyright (c) 2014 Robin Randhawa
@@ -243,16 +243,14 @@ ENTRY(aarch64_tlbi_by_asid_va)
/* x8 = bit 63[ASID]48, 47[RES0]44, 43[VA(55:12)]0 */
lsl x8, x0, #48
bfxil x8, x1, #12, #44
-#ifdef MULTIPROCESSOR
- /* need dsb and isb for inner shareable? */
dsb ishst
+#ifdef MULTIPROCESSOR
tlbi vae1is, x8
- dsb ish
- isb
#else
- /* no need dsb and isb for single entry */
tlbi vae1, x8
#endif
+ dsb ish
+ isb
ret
END(aarch64_tlbi_by_asid_va)
@@ -261,15 +259,13 @@ ENTRY(aarch64_tlbi_by_asid_va_ll)
/* x8 = bit 63[ASID]48, 47[RES0]44, 43[VA(55:12)]0 */
lsl x8, x0, #48
bfxil x8, x1, #12, #44
-#ifdef MULTIPROCESSOR
- /* need dsb and isb for inner shareable? */
dsb ishst
+#ifdef MULTIPROCESSOR
tlbi vale1is, x8
- dsb ish
- isb
#else
- /* no need dsb and isb for single entry */
tlbi vale1, x8
#endif
+ dsb ish
+ isb
ret
END(aarch64_tlbi_by_asid_va_ll)
