Module Name: src
Committed By: ryo
Date: Sun Sep 22 16:41:19 UTC 2019
Modified Files:
src/sys/dev/ic: rtl8169.c rtl81x9var.h
Log Message:
8168H model didn't link up well. some models seems to require to enable TX/RX
after configuration.
RTKQ_TXRXEN_LATER quirk flag added. it may be able to unify with
RTKQ_RXDV_GATED flag?
To generate a diff of this commit:
cvs rdiff -u -r1.159 -r1.160 src/sys/dev/ic/rtl8169.c
cvs rdiff -u -r1.56 -r1.57 src/sys/dev/ic/rtl81x9var.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/dev/ic/rtl8169.c
diff -u src/sys/dev/ic/rtl8169.c:1.159 src/sys/dev/ic/rtl8169.c:1.160
--- src/sys/dev/ic/rtl8169.c:1.159 Thu May 30 02:32:18 2019
+++ src/sys/dev/ic/rtl8169.c Sun Sep 22 16:41:19 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rtl8169.c,v 1.159 2019/05/30 02:32:18 msaitoh Exp $ */
+/* $NetBSD: rtl8169.c,v 1.160 2019/09/22 16:41:19 ryo Exp $ */
/*
* Copyright (c) 1997, 1998-2003
@@ -33,7 +33,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: rtl8169.c,v 1.159 2019/05/30 02:32:18 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: rtl8169.c,v 1.160 2019/09/22 16:41:19 ryo Exp $");
/* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
/*
@@ -607,12 +607,16 @@ re_attach(struct rtk_softc *sc)
sc->sc_quirk |= RTKQ_NOJUMBO;
break;
case RTK_HWREV_8168E:
- case RTK_HWREV_8168H:
case RTK_HWREV_8168H_SPIN1:
sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_PHYWAKE_PM |
RTKQ_NOJUMBO;
break;
+ case RTK_HWREV_8168H:
+ sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
+ RTKQ_MACSTAT | RTKQ_CMDSTOP | RTKQ_PHYWAKE_PM |
+ RTKQ_NOJUMBO | RTKQ_RXDV_GATED | RTKQ_TXRXEN_LATER;
+ break;
case RTK_HWREV_8168E_VL:
case RTK_HWREV_8168F:
sc->sc_quirk |= RTKQ_DESCV2 | RTKQ_NOEECMD |
@@ -1873,7 +1877,8 @@ re_init(struct ifnet *ifp)
/*
* Enable transmit and receive.
*/
- CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
+ if ((sc->sc_quirk & RTKQ_TXRXEN_LATER) == 0)
+ CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
/*
* Set the initial TX and RX configuration.
@@ -1915,6 +1920,12 @@ re_init(struct ifnet *ifp)
rtk_setmulti(sc);
/*
+ * some chips require to enable TX/RX *AFTER* TX/RX configuration
+ */
+ if ((sc->sc_quirk & RTKQ_TXRXEN_LATER) != 0)
+ CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
+
+ /*
* Enable interrupts.
*/
if (sc->re_testmode)
Index: src/sys/dev/ic/rtl81x9var.h
diff -u src/sys/dev/ic/rtl81x9var.h:1.56 src/sys/dev/ic/rtl81x9var.h:1.57
--- src/sys/dev/ic/rtl81x9var.h:1.56 Wed Apr 19 00:20:02 2017
+++ src/sys/dev/ic/rtl81x9var.h Sun Sep 22 16:41:19 2019
@@ -1,4 +1,4 @@
-/* $NetBSD: rtl81x9var.h,v 1.56 2017/04/19 00:20:02 jmcneill Exp $ */
+/* $NetBSD: rtl81x9var.h,v 1.57 2019/09/22 16:41:19 ryo Exp $ */
/*
* Copyright (c) 1997, 1998
@@ -194,6 +194,7 @@ struct rtk_softc {
#define RTKQ_PHYWAKE_PM 0x00000400 /* wake PHY from power down */
#define RTKQ_RXDV_GATED 0x00000800
#define RTKQ_IM_HW 0x00001000 /* HW interrupt mitigation */
+#define RTKQ_TXRXEN_LATER 0x00002000 /* TX/RX enable timing */
bus_dma_tag_t sc_dmat;
